linux-kernel - [PATCH v3] KVM: x86/pt: Ignore all unknown Intel PT capabilities

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Message-Id: <20220112041100.26769-1-likexu@tencent.com>
Date:   Wed, 12 Jan 2022 12:11:00 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>
Cc:     Jim Mattson <jmattson@...gle.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Joerg Roedel <joro@...tes.org>, x86@...nel.org,
        kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3] KVM: x86/pt: Ignore all unknown Intel PT capabilities

From: Like Xu <likexu@...cent.com>

Some of the new Intel PT capabilities (e.g. SDM Vol3, 32.2.4 Event
Tracing, exposes details about the asynchronous events, when they are
generated, and when their corresponding software event handler completes
execution) cannot be safely and fully emulated by the KVM, especially
emulating the simultaneous writing of guest PT packets generated by
the KVM to the guest PT buffer.

For KVM, it's better to advertise currently supported features based on
the "static struct pt_cap_desc" implemented in the host PT driver and
ignore _all_ unknown features before they have been investigated one by
one and supported in a safe manner, leaving the rest as system-wide-only
tracing capabilities.

Suggested-by: Paolo Bonzini <pbonzini@...hat.com>
Signed-off-by: Like Xu <likexu@...cent.com>
---
v2 -> v3 Changelog:
- Remove unnecessary comment; (Sean)
- Add a #define in the pt header for better self-documentin; (Sean)
- Add validity checks to CPUID E{A|B|C|D}X; (Sean)

Previous:
https://lore.kernel.org/kvm/20220110034747.30498-1-likexu@tencent.com/

 arch/x86/include/asm/intel_pt.h | 6 ++++++
 arch/x86/kvm/cpuid.c            | 6 +++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
index ebe8d2ea44fe..da94d0eeb9df 100644
--- a/arch/x86/include/asm/intel_pt.h
+++ b/arch/x86/include/asm/intel_pt.h
@@ -24,6 +24,12 @@ enum pt_capabilities {
 	PT_CAP_psb_periods,
 };
 
+#define GUEST_SUPPORTED_CPUID_14_EBX	\
+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5))
+
+#define GUEST_SUPPORTED_CPUID_14_ECX	\
+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(31))
+
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
 void cpu_emergency_stop_pt(void);
 extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 0b920e12bb6d..be8c9170f98e 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -19,6 +19,7 @@
 #include <asm/user.h>
 #include <asm/fpu/xstate.h>
 #include <asm/sgx.h>
+#include <asm/intel_pt.h>
 #include "cpuid.h"
 #include "lapic.h"
 #include "mmu.h"
@@ -900,7 +901,10 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
 			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
 			break;
 		}
-
+		entry->eax = min(entry->eax, 1u);
+		entry->ebx &= GUEST_SUPPORTED_CPUID_14_EBX;
+		entry->ecx &= GUEST_SUPPORTED_CPUID_14_ECX;
+		entry->edx = 0;
 		for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
 			if (!do_host_cpuid(array, function, i))
 				goto out;
-- 
2.33.1