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Message-ID: <20220112163356.25634-10-yann.gautier@foss.st.com>
Date: Wed, 12 Jan 2022 17:33:55 +0100
From: Yann Gautier <yann.gautier@...s.st.com>
To: Rob Herring <robh+dt@...nel.org>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
<devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>
CC: <linux-kernel@...r.kernel.org>, <linux-mmc@...r.kernel.org>,
Yann Gautier <yann.gautier@...s.st.com>
Subject: [PATCH 09/10] ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
STM32MP13 embeds 2 instances of SDMMC peripheral.
Add the required information in SoC device tree file.
Signed-off-by: Yann Gautier <yann.gautier@...s.st.com>
---
arch/arm/boot/dts/stm32mp131.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 7189cba6b256..a1efb545ca3d 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -135,6 +135,20 @@
status = "disabled";
};
+ sdmmc2: mmc@...07000 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x20253180>;
+ reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&clk_pll4_p>;
+ clock-names = "apb_pclk";
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <130000000>;
+ status = "disabled";
+ };
+
iwdg2: watchdog@...02000 {
compatible = "st,stm32mp1-iwdg";
reg = <0x5a002000 0x400>;
--
2.17.1
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