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Message-ID: <b9fac286-9227-b26b-221b-7f54b63e6b0b@canonical.com>
Date: Thu, 13 Jan 2022 13:49:57 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Alim Akhtar <alim.akhtar@...sung.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: soc@...nel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, olof@...om.net,
linus.walleij@...aro.org, catalin.marinas@....com,
robh+dt@...nel.org, s.nawrocki@...sung.com,
linux-samsung-soc@...r.kernel.org, pankaj.dubey@...sung.com,
linux-fsd@...la.com, Jayati Sahu <jayati.sahu@...sung.com>,
Ajay Kumar <ajaykumar.rs@...sung.com>
Subject: Re: [PATCH 03/23] clk: samsung: fsd: Add initial clock support
On 13/01/2022 13:11, Alim Akhtar wrote:
> Add initial clock support for FSD (Full Self-Driving) SoC
> which is required to bring-up platforms based on this SoC.
>
> Cc: linux-fsd@...la.com
> Signed-off-by: Jayati Sahu <jayati.sahu@...sung.com>
> Signed-off-by: Ajay Kumar <ajaykumar.rs@...sung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@...sung.com>
> Signed-off-by: Alim Akhtar <alim.akhtar@...sung.com>
> ---
> drivers/clk/samsung/Makefile | 1 +
> drivers/clk/samsung/clk-fsd.c | 308 ++++++++++++++++++++++++++++++++++
> drivers/clk/samsung/clk-pll.c | 1 +
> drivers/clk/samsung/clk-pll.h | 1 +
> 4 files changed, 311 insertions(+)
> create mode 100644 drivers/clk/samsung/clk-fsd.c
>
> diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
> index c46cf11e4d0b..d66b2ede004c 100644
> --- a/drivers/clk/samsung/Makefile
> +++ b/drivers/clk/samsung/Makefile
> @@ -18,6 +18,7 @@ obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o
> obj-$(CONFIG_EXYNOS_CLKOUT) += clk-exynos-clkout.o
> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o
> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o
> +obj-$(CONFIG_ARCH_TESLA_FSD) += clk-fsd.o
It should be rather it's own CONFIG_TESLA_FSD_CLK option, just like
other Exynos designs. This keeps unified approach with existing Samsung
clock Kconfig.
> obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o
> obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
> obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
> diff --git a/drivers/clk/samsung/clk-fsd.c b/drivers/clk/samsung/clk-fsd.c
> new file mode 100644
> index 000000000000..e47523106d9e
> --- /dev/null
> +++ b/drivers/clk/samsung/clk-fsd.c
> @@ -0,0 +1,308 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Common Clock Framework support for FSD SoC.
> + *
> + * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd.
> + * https://www.samsung.com
> + * Copyright (c) 2017-2022 Tesla, Inc.
> + * https://www.tesla.com
> + *
Drop the line break with empty * comment.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/of.h>
> +
> +#include "clk.h"
> +#include <dt-bindings/clock/fsd-clk.h>
dt-bindings headers before local clk.h.
> +
> +/* Register Offset definitions for CMU_CMU (0x11c10000) */
Best regards,
Krzysztof
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