linux-kernel - [PATCH 0/2] perf: arm_spe: make the PMSCR CX bit[3] consistent across the session

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Message-Id: <20220113175417.5523-1-german.gomez@arm.com>
Date:   Thu, 13 Jan 2022 17:54:15 +0000
From:   German Gomez <german.gomez@....com>
To:     linux-eng@....com
Cc:     james.clark@....com, German Gomez <german.gomez@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 0/2] perf: arm_spe: make the PMSCR CX bit[3] consistent across the session

The value of the CX bit of the PMSCR register is not consistent across
a perf session. There is an example in [1/2] to reproduce the issue.

This cset applies a small correction to fix the consistency issue.

- [PATCH 1/2] Makes the CX bit consistent by caching the value during
  the initialization of the SPE PMU event.
- [PATCH 2/2] Allows CONTEXT packets when profiling in CPU mode.

German Gomez (2):
  perf: arm_spe: make the PMSCR CX bit[3] consistent across the session
  perf: arm_spe: Enable CONTEXT packets if profiling in CPU mode

 drivers/perf/arm_spe_pmu.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

-- 
2.25.1