lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 14 Jan 2022 12:31:35 +0100
From:   Laurent Vivier <laurent@...ier.eu>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:     Arnd Bergmann <arnd@...db.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        linux-m68k <linux-m68k@...ts.linux-m68k.org>,
        John Stultz <john.stultz@...aro.org>,
        linux-rtc@...r.kernel.org,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>
Subject: Re: [PATCH v6 3/4] clocksource/drivers: Add a goldfish-timer
 clocksource

Le 14/01/2022 à 12:12, Geert Uytterhoeven a écrit :
> Hi Laurent,
> 
> On Fri, Jan 14, 2022 at 12:03 PM Laurent Vivier <laurent@...ier.eu> wrote:
>> Le 14/01/2022 à 11:46, Arnd Bergmann a écrit :
>>> On Thu, Jan 13, 2022 at 9:19 PM Laurent Vivier <laurent@...ier.eu> wrote:
>>>> +static int goldfish_timer_set_oneshot(struct clock_event_device *evt)
>>>> +{
>>>> +       struct goldfish_timer *timerdrv = ced_to_gf(evt);
>>>> +       void __iomem *base = timerdrv->base;
>>>> +
>>>> +       __raw_writel(0, base + TIMER_ALARM_HIGH);
>>>> +       __raw_writel(0, base + TIMER_ALARM_LOW);
>>>> +       __raw_writel(1, base + TIMER_IRQ_ENABLED);
>>>
>>> As mentioned elsewhere, the __raw_* accessors are not portable, please
>>> use readl()/writel() here, or possibly ioread32_be()/iowrite32_be() for
>>> the big-endian variant.
>>
>> We can't use readl()/writel() here because it's supposed to read from a little endian device, and
>> goldfish endianness depends on the endianness of the machine.
>>
>> For goldfish, readl()/writel() works fine on little-endian machine but not on big-endian machine.
>>
>> On m68k, you have:
>>
>> #define readl(addr)      in_le32(addr)
>> #define writel(val,addr) out_le32((addr),(val))
>>
>> and with goldfish it's wrong as the device is not little-endian, it is big-endian like the machine.
>>
>> same comment with ioread32_be()/iowrite32_be(): it will work on big-endian machine not on little-endian.
>>
>> We need an accessor that doesn't byteswap the value, that accesses it natively, and in all other
>> parts of the kernel __raw_writel() and __raw_readl() are used.
> 
> Hence Arnd's suggestion to define custom accessors in the Goldfish
> RTC driver, that map to {read,write}l() on little-endian, and to
> io{read,write}32_be() on big-endian.
> 
> BTW, I'd go for io{read,write}32() on little endian instead, for
> symmetry.

You mean something like that:

#ifdef CONFIG_CPU_BIG_ENDIAN
#define raw_ioread32 ioread32be
#define raw_iowrite32 iowrite32be
#else
#define raw_ioread32 ioread32
#define raw_iowrite32 iowrite32
#endif

and then use raw_ioread32()/raw_iowrite32() rather than readl()/writel()?

Thanks,
Laurent

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ