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Message-ID: <56d0a5d3-65e7-db59-7704-e9868952bb45@gmail.com>
Date:   Fri, 14 Jan 2022 17:02:50 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Miles Chen <miles.chen@...iatek.com>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Junzhi Zhao <junzhi.zhao@...iatek.com>,
        Jie Qiu <jie.qiu@...iatek.com>
Cc:     Zhiqiang Lin <zhiqiang.lin@...iatek.com>,
        CK Hu <ck.hu@...iatek.com>, dri-devel@...ts.freedesktop.org,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] drm/mediatek: Fix mtk_cec_mask()



On 03/01/2022 06:47, Miles Chen wrote:
> In current implementation, mtk_cec_mask() writes val into target register
> and ignores the mask. After talking to our hdmi experts, mtk_cec_mask()
> should read a register, clean only mask bits, and update (val | mask) bits
> to the register.
> 
> Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support")
> 

Normally there is no new line here.

> Cc: Zhiqiang Lin <zhiqiang.lin@...iatek.com>
> Cc: CK Hu <ck.hu@...iatek.com>
> Cc: Matthias Brugger <matthias.bgg@...il.com>
> 

Neither here.

> Signed-off-by: Miles Chen <miles.chen@...iatek.com>
> 

But that are nit-picks. I leave it to the maintainer to decide if he want to fix 
that when applying the patch:

Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>

Thanks a lot,
Matthias

> ---
> 
> Change since v1:
> add Fixes tag
> 
> Change since v2:
> add explanation of mtk_cec_mask()
> 
> Change since v3:
> change misleading subject and modify the commit message since this is a bug fix patch
> 
> ---
>   drivers/gpu/drm/mediatek/mtk_cec.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c b/drivers/gpu/drm/mediatek/mtk_cec.c
> index e9cef5c0c8f7..cdfa648910b2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_cec.c
> +++ b/drivers/gpu/drm/mediatek/mtk_cec.c
> @@ -85,7 +85,7 @@ static void mtk_cec_mask(struct mtk_cec *cec, unsigned int offset,
>   	u32 tmp = readl(cec->regs + offset) & ~mask;
>   
>   	tmp |= val & mask;
> -	writel(val, cec->regs + offset);
> +	writel(tmp, cec->regs + offset);
>   }
>   
>   void mtk_cec_set_hpd_event(struct device *dev,
> 

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