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Message-ID: <CAPLW+4ny15Jf4+6vFaTUa2thc5cHyHQtC9pyzspwO7Vahi30Hw@mail.gmail.com>
Date: Fri, 14 Jan 2022 18:40:15 +0200
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: Tomasz Figa <tomasz.figa@...il.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Marek Szyprowski <m.szyprowski@...sung.com>,
Chanho Park <chanho61.park@...sung.com>,
Alim Akhtar <alim.akhtar@...il.com>
Subject: Re: [PATCH v2 20/28] arm64: dts: exynos: align pinctrl with dtschema
in ExynosAutov9
On Tue, 11 Jan 2022 at 22:18, Krzysztof Kozlowski
<krzysztof.kozlowski@...onical.com> wrote:
>
> Align the pin controller related nodes with dtschema. No functional
> change expected.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
> .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 50 +++++++++----------
> 1 file changed, 25 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi
> index 2407b03b5404..ef0349d1c3d0 100644
> --- a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi
> @@ -11,7 +11,7 @@
> #include <dt-bindings/pinctrl/samsung.h>
>
> &pinctrl_alive {
> - gpa0: gpa0 {
> + gpa0: gpa0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> @@ -27,7 +27,7 @@ gpa0: gpa0 {
> <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - gpa1: gpa1 {
> + gpa1: gpa1-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> @@ -47,7 +47,7 @@ dp1_hpd: dp1-hpd-pins {
> samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> };
>
> - gpq0: gpq0 {
> + gpq0: gpq0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -69,7 +69,7 @@ speedy1_bus: speedy1-bus-pins {
> };
>
> &pinctrl_aud {
> - gpb0: gpb0 {
> + gpb0: gpb0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -77,7 +77,7 @@ gpb0: gpb0 {
> #interrupt-cells = <2>;
> };
>
> - gpb1: gpb1 {
> + gpb1: gpb1-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -85,7 +85,7 @@ gpb1: gpb1 {
> #interrupt-cells = <2>;
> };
>
> - gpb2: gpb2 {
> + gpb2: gpb2-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -93,7 +93,7 @@ gpb2: gpb2 {
> #interrupt-cells = <2>;
> };
>
> - gpb3: gpb3 {
> + gpb3: gpb3-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -199,7 +199,7 @@ aud_i2s6_idle: aaud-i2s6-idle-pins {
> };
>
> &pinctrl_fsys0 {
> - gpf0: gpf0 {
> + gpf0: gpf0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -207,7 +207,7 @@ gpf0: gpf0 {
> #interrupt-cells = <2>;
> };
>
> - gpf1: gpf1 {
> + gpf1: gpf1-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -355,7 +355,7 @@ pcie_perst5_in: pcie-perst5-in-pins {
> };
>
> &pinctrl_fsys1 {
> - gpf8: gpf8 {
> + gpf8: gpf8-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -393,7 +393,7 @@ sd2_bus4: sd2-bus-width4-pins {
> };
>
> &pinctrl_fsys2 {
> - gpf2: gpf2 {
> + gpf2: gpf2-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -401,7 +401,7 @@ gpf2: gpf2 {
> #interrupt-cells = <2>;
> };
>
> - gpf3: gpf3 {
> + gpf3: gpf3-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -409,7 +409,7 @@ gpf3: gpf3 {
> #interrupt-cells = <2>;
> };
>
> - gpf4: gpf4 {
> + gpf4: gpf4-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -417,7 +417,7 @@ gpf4: gpf4 {
> #interrupt-cells = <2>;
> };
>
> - gpf5: gpf5 {
> + gpf5: gpf5-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -425,7 +425,7 @@ gpf5: gpf5 {
> #interrupt-cells = <2>;
> };
>
> - gpf6: gpf6 {
> + gpf6: gpf6-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -499,7 +499,7 @@ eth1_pps_out: eth1-pps-out-pins {
> };
>
> &pinctrl_peric0 {
> - gpp0: gpp0 {
> + gpp0: gpp0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -507,7 +507,7 @@ gpp0: gpp0 {
> #interrupt-cells = <2>;
> };
>
> - gpp1: gpp1 {
> + gpp1: gpp1-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -515,7 +515,7 @@ gpp1: gpp1 {
> #interrupt-cells = <2>;
> };
>
> - gpp2: gpp2 {
> + gpp2: gpp2-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -523,7 +523,7 @@ gpp2: gpp2 {
> #interrupt-cells = <2>;
> };
>
> - gpg0: gpg0 {
> + gpg0: gpg0-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -833,7 +833,7 @@ uart5_bus_dual: uart5-bus-dual-pins {
> };
>
> &pinctrl_peric1 {
> - gpp3: gpp3 {
> + gpp3: gpp3-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -841,7 +841,7 @@ gpp3: gpp3 {
> #interrupt-cells = <2>;
> };
>
> - gpp4: gpp4 {
> + gpp4: gpp4-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -849,7 +849,7 @@ gpp4: gpp4 {
> #interrupt-cells = <2>;
> };
>
> - gpp5: gpp5 {
> + gpp5: gpp5-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -857,7 +857,7 @@ gpp5: gpp5 {
> #interrupt-cells = <2>;
> };
>
> - gpg1: gpg1 {
> + gpg1: gpg1-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -865,7 +865,7 @@ gpg1: gpg1 {
> #interrupt-cells = <2>;
> };
>
> - gpg2: gpg2 {
> + gpg2: gpg2-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> @@ -873,7 +873,7 @@ gpg2: gpg2 {
> #interrupt-cells = <2>;
> };
>
> - gpg3: gpg3 {
> + gpg3: gpg3-gpio-bank {
> gpio-controller;
> #gpio-cells = <2>;
>
> --
> 2.32.0
>
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