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Date: Fri, 14 Jan 2022 11:08:05 +0800 From: Liang Yang <liang.yang@...ogic.com> To: Stephen Boyd <sboyd@...nel.org>, Jerome Brunet <jbrunet@...libre.com>, Kevin Hilman <khilman@...libre.com>, Michael Turquette <mturquette@...libre.com>, Neil Armstrong <narmstrong@...libre.com>, Rob Herring <robh+dt@...nel.org>, <linux-clk@...r.kernel.org> CC: Martin Blumenstingl <martin.blumenstingl@...glemail.com>, Jianxin Pan <jianxin.pan@...ogic.com>, Victor Wan <victor.wan@...ogic.com>, XianWei Zhao <xianwei.zhao@...ogic.com>, Kelvin Zhang <kelvin.zhang@...ogic.com>, BiChao Zheng <bichao.zheng@...ogic.com>, YongHui Yu <yonghui.yu@...ogic.com>, <linux-arm-kernel@...ts.infradead.org>, <linux-amlogic@...ts.infradead.org>, <linux-kernel@...r.kernel.org> Subject: Re: [PATCH v9 2/4] clk: meson: add emmc sub clock phase delay driver On 2022/1/14 5:29, Stephen Boyd wrote: > [ EXTERNAL EMAIL ] > > Quoting Liang Yang (2022-01-13 03:57:43) >> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile >> index b3ef5f67820f..c450f38d3801 100644 >> --- a/drivers/clk/meson/Makefile >> +++ b/drivers/clk/meson/Makefile >> @@ -11,6 +11,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o >> obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o >> obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o >> obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o >> +obj-$(CONFIG_COMMON_CLK_MESON_PHASE_DELAY) += clk-phase-delay.o > > Sort by Kconfig symbol? ok, it will fix it. > >> >> # Amlogic Clock controllers >> > > .
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