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Message-ID: <d6933fd7-ec4c-aee1-5cf4-9cbcf881a33d@amlogic.com>
Date: Mon, 17 Jan 2022 10:43:01 +0800
From: Liang Yang <liang.yang@...ogic.com>
To: Stephen Boyd <sboyd@...nel.org>,
Jerome Brunet <jbrunet@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Neil Armstrong <narmstrong@...libre.com>,
Rob Herring <robh+dt@...nel.org>, <linux-clk@...r.kernel.org>
CC: Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Jianxin Pan <jianxin.pan@...ogic.com>,
Victor Wan <victor.wan@...ogic.com>,
XianWei Zhao <xianwei.zhao@...ogic.com>,
Kelvin Zhang <kelvin.zhang@...ogic.com>,
BiChao Zheng <bichao.zheng@...ogic.com>,
YongHui Yu <yonghui.yu@...ogic.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock
controller
On 2022/1/15 6:59, Stephen Boyd wrote:
> [ EXTERNAL EMAIL ]
>
> Quoting Liang Yang (2022-01-13 19:06:07)
>> Hi Stephen,
>>
>> Thanks for your quick response.
>>
>> On 2022/1/14 5:29, Stephen Boyd wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> Quoting Liang Yang (2022-01-13 03:57:44)
>>>> Document the MMC sub clock controller driver, the potential consumer
>>>> of this driver is MMC or NAND. Also add four clock bindings IDs which
>>>> provided by this driver.
>>>>
>>>> Signed-off-by: Liang Yang <liang.yang@...ogic.com>
>>>> ---
>>>> .../bindings/clock/amlogic,mmc-clkc.yaml | 64 +++++++++++++++++++
>>>> include/dt-bindings/clock/amlogic,mmc-clkc.h | 14 ++++
>>>> 2 files changed, 78 insertions(+)
>>>> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
>>>> create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
>>>> new file mode 100644
>>>> index 000000000000..a274c3d5fc2e
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
>>>> @@ -0,0 +1,64 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Amlogic MMC Sub Clock Controller Driver Device Tree Bindings
>>>> +
>>>> +maintainers:
>>>> + - jianxin.pan@...ogic.com
>>>> + - liang.yang@...ogic.com
>>>> +
>>>> +properties:
>>>> + compatible:
>>>> + enum:
>>>> + - "amlogic,axg-mmc-clkc", "syscon"
>>>
>>> Why is it a syscon?
>>
>> The register documented by reg is shared with SD/eMMC controller port C,
>> and it need to be ops on NFC driver.
>>
>
> Is this the case where the clk is inside the SD/eMMC controller? Can the
yes.
> mmc driver register the clk controller from there and pass it an iomem
> pointer to poke clks?
we can't do that since EMMC and NAND is mutually exclusivem. both of
them share the same data pins.
>
> .
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