lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <544f5085fc8597ce9ce3eb7dc1b5d08fb1ac8755.camel@mediatek.com>
Date:   Tue, 18 Jan 2022 17:25:25 +0800
From:   Johnson Wang <johnson.wang@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>, <robh+dt@...nel.org>
CC:     <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <angelogioacchino.delregno@...labora.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v2 1/2] soc: mediatek: pwrap: add pwrap driver for
 MT8186 SoC

Hi Matthias,

On Fri, 2022-01-14 at 16:46 +0100, Matthias Brugger wrote:
> 
> On 07/01/2022 11:46, Johnson Wang wrote:
> > MT8186 are highly integrated SoC and use PMIC_MT6366 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6366.
> > 
> 
> It seems this new arbiter is significantly different from the version
> 1. Please 
> explain that in the commit message.
> 
> > Signed-off-by: Johnson Wang <johnson.wang@...iatek.com>
> > ---
> >   drivers/soc/mediatek/mtk-pmic-wrap.c | 72
> > ++++++++++++++++++++++++++++
> >   1 file changed, 72 insertions(+)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 952bc554f443..78866ebf7f04 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -30,6 +30,7 @@
> >   #define PWRAP_GET_WACS_REQ(x)		(((x) >> 19) &
> > 0x00000001)
> >   #define PWRAP_STATE_SYNC_IDLE0		BIT(20)
> >   #define PWRAP_STATE_INIT_DONE0		BIT(21)
> > +#define PWRAP_STATE_INIT_DONE0_V2	BIT(22)
> 
> That's a strange name, does it come from the datasheet description?

Thanks for your review.

No, there is only PWRAP_STATE_INIT_DONE0 in MT8186 datasheet.
However, it's the 22nd bit in MT8186 and the 21st bit in other SoCs.
So we changed its name to avoid redefinition of PWRAP_STATE_INIT_DONE0.

Could you give us some suggestion on proper definition naming?
Do you think PWRAP_STATE_INIT_DONE0_MT8186 will be a better choice?

> 
> >   #define PWRAP_STATE_INIT_DONE1		BIT(15)
> >   
> >   /* macro for WACS FSM */
> > @@ -77,6 +78,8 @@
> >   #define PWRAP_CAP_INT1_EN	BIT(3)
> >   #define PWRAP_CAP_WDT_SRC1	BIT(4)
> >   #define PWRAP_CAP_ARB		BIT(5)
> > +#define PWRAP_CAP_MONITOR_V2	BIT(6)
> 
> Not used capability, please delete.
> 
> 
> Regards,
> Matthias

PWRAP_CAP_MONITOR_V2 is not used right now.
We can remove it in next version.
But this capability will be added when we need it.

Thanks.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ