| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAJMQK-hXO7m8dMZgLvWDz9QVF7KhA3gKmf=SmOFA=x5Jk8N_kg@mail.gmail.com>
Date: Thu, 20 Jan 2022 01:02:23 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: Robert Foss <robert.foss@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>, Xin Ji <xji@...logixsemi.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Andrzej Hajda <a.hajda@...sung.com>,
Neil Armstrong <narmstrong@...libre.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Sam Ravnborg <sam@...nborg.org>,
Maxime Ripard <maxime@...no.tech>
Subject: Re: [PATCH v5 1/4] drm/bridge: anx7625: send DPCD command to downstream
On Wed, Jan 19, 2022 at 11:38 PM Robert Foss <robert.foss@...aro.org> wrote:
>
> On Wed, 19 Jan 2022 at 16:17, Hsin-Yi Wang <hsinyi@...omium.org> wrote:
> >
> > From: Xin Ji <xji@...logixsemi.com>
> >
> > Send DPCD command to downstream before anx7625 power down,
> > let downstream monitor enter into standby mode.
> >
> > Signed-off-by: Xin Ji <xji@...logixsemi.com>
> > Signed-off-by: Hsin-Yi Wang <hsinyi@...omium.org>
Reviewed-by: Hsin-Yi Wang <hsinyi@...omium.org>
>
> Hsin-Yi: Can you supply a r-b tag to this patch if it looks good to you?
>
> > ---
> > v3->v4:
> > Use common DP_AUX_NATIVE_READ/WRITE
> >
> > Previously in:
> > https://patchwork.kernel.org/project/dri-devel/patch/1f36f8bf0a48fb2bba17bacec23700e58c1d407d.1641891874.git.xji@analogixsemi.com/
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 42 +++++++++++++++++++----
> > drivers/gpu/drm/bridge/analogix/anx7625.h | 2 --
> > 2 files changed, 35 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 76662fce4ce61d..17b23940549a42 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -129,6 +129,23 @@ static int anx7625_reg_write(struct anx7625_data *ctx,
> > return ret;
> > }
> >
> > +static int anx7625_reg_block_write(struct anx7625_data *ctx,
> > + struct i2c_client *client,
> > + u8 reg_addr, u8 len, u8 *buf)
> > +{
> > + int ret;
> > + struct device *dev = &client->dev;
> > +
> > + i2c_access_workaround(ctx, client);
> > +
> > + ret = i2c_smbus_write_i2c_block_data(client, reg_addr, len, buf);
> > + if (ret < 0)
> > + dev_err(dev, "write i2c block failed id=%x\n:%x",
> > + client->addr, reg_addr);
> > +
> > + return ret;
> > +}
> > +
> > static int anx7625_write_or(struct anx7625_data *ctx,
> > struct i2c_client *client,
> > u8 offset, u8 mask)
> > @@ -214,8 +231,8 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> > return 0;
> > }
> >
> > -static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > - u32 address, u8 len, u8 *buf)
> > +static int anx7625_aux_dpcd_trans(struct anx7625_data *ctx, u8 op,
> > + u32 address, u8 len, u8 *buf)
> > {
> > struct device *dev = &ctx->client->dev;
> > int ret;
> > @@ -231,8 +248,7 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > addrm = (address >> 8) & 0xFF;
> > addrh = (address >> 16) & 0xFF;
> >
> > - cmd = DPCD_CMD(len, DPCD_READ);
> > - cmd = ((len - 1) << 4) | 0x09;
> > + cmd = DPCD_CMD(len, op);
> >
> > /* Set command and length */
> > ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > @@ -246,6 +262,9 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > AP_AUX_ADDR_19_16, addrh);
> >
> > + if (op == DP_AUX_NATIVE_WRITE)
> > + ret |= anx7625_reg_block_write(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_BUFF_START, len, buf);
> > /* Enable aux access */
> > ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> > AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> > @@ -255,14 +274,17 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > return -EIO;
> > }
> >
> > - usleep_range(2000, 2100);
> > -
> > ret = wait_aux_op_finish(ctx);
> > if (ret) {
> > dev_err(dev, "aux IO error: wait aux op finish.\n");
> > return ret;
> > }
> >
> > + /* Write done */
> > + if (op == DP_AUX_NATIVE_WRITE)
> > + return 0;
> > +
> > + /* Read done, read out dpcd data */
> > ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> > AP_AUX_BUFF_START, len, buf);
> > if (ret < 0) {
> > @@ -845,7 +867,7 @@ static int anx7625_hdcp_enable(struct anx7625_data *ctx)
> > }
> >
> > /* Read downstream capability */
> > - anx7625_aux_dpcd_read(ctx, 0x68028, 1, &bcap);
> > + anx7625_aux_dpcd_trans(ctx, DP_AUX_NATIVE_READ, 0x68028, 1, &bcap);
> > if (!(bcap & 0x01)) {
> > pr_warn("downstream not support HDCP 1.4, cap(%x).\n", bcap);
> > return 0;
> > @@ -918,6 +940,7 @@ static void anx7625_dp_stop(struct anx7625_data *ctx)
> > {
> > struct device *dev = &ctx->client->dev;
> > int ret;
> > + u8 data;
> >
> > DRM_DEV_DEBUG_DRIVER(dev, "stop dp output\n");
> >
> > @@ -929,6 +952,11 @@ static void anx7625_dp_stop(struct anx7625_data *ctx)
> > ret |= anx7625_write_and(ctx, ctx->i2c.tx_p2_client, 0x08, 0x7f);
> >
> > ret |= anx7625_video_mute_control(ctx, 1);
> > +
> > + dev_dbg(dev, "notify downstream enter into standby\n");
> > + /* Downstream monitor enter into standby mode */
> > + data = 2;
> > + ret |= anx7625_aux_dpcd_trans(ctx, DP_AUX_NATIVE_WRITE, 0x000600, 1, &data);
> > if (ret < 0)
> > DRM_DEV_ERROR(dev, "IO error : mute video fail\n");
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h
> > index 56165f5b254c14..64a8ab56529404 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.h
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
> > @@ -242,8 +242,6 @@
> >
> > #define AP_AUX_COMMAND 0x27 /* com+len */
> > #define LENGTH_SHIFT 4
> > -#define DPCD_READ 0x09
> > -#define DPCD_WRITE 0x08
> > #define DPCD_CMD(len, cmd) ((((len) - 1) << LENGTH_SHIFT) | (cmd))
> >
> > /* Bit 0&1: 3D video structure */
> > --
> > 2.34.1.703.g22d0c6ccf7-goog
> >
Powered by blists - more mailing lists