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Message-ID: <CAMuHMdXwe3_F8NeePnoFrLwyzKUwnHtmETC=ambgsC2N3w_h8A@mail.gmail.com>
Date: Thu, 20 Jan 2022 09:30:07 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
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Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, Lee Jones <lee.jones@...aro.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
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Lewis Hanly <lewis.hanly@...rochip.com>,
daire.mcnamara@...rochip.com, ivan.griffin@...rochip.com,
Atish Patra <atishp@...osinc.com>
Subject: Re: [PATCH v4 03/14] dt-bindings: i2c: add bindings for microchip
mpfs i2c
Hi Conor,
On Mon, Jan 17, 2022 at 12:06 PM <conor.dooley@...rochip.com> wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Add device tree bindings for the i2c controller on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Daire McNamara <daire.mcnamara@...rochip.com>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i2c/microchip,mpfs-i2c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip MPFS I2C Controller Device Tree Bindings
> +
> +maintainers:
> + - Daire McNamara <daire.mcnamara@...rochip.com>
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
> + - microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
Wouldn't it be more logical to have:
items:
- const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
- const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
?
If the IP core is reused, it can become:
items:
- enum:
- microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
- microchip,<foo>-i2c # ...
- const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
That way the driver can just match on the second (fallback) value,
and no further driver changes will be needed (until v8 or later).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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