| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1642673511-8267-1-git-send-email-kkartik@nvidia.com>
Date: Thu, 20 Jan 2022 15:41:51 +0530
From: Kartik <kkartik@...dia.com>
To: <robh+dt@...nel.org>, <treding@...dia.com>, <jonathanh@...dia.com>,
<mperttunen@...dia.com>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<kkartik@...dia.com>
Subject: [PATCH] arm64: tegra: enable uart instance on 40-pin header
From: kartik <kkartik@...dia.com>
On P3737 board, UART-A is available on 40-pin header.
Enable UART-A for P3737 and change the compatible string to
"nvidia,tegra194-hsuart". This enables serial-tegra driver, which
supports HW flow control and is the preffered driver for higher
baud rates.
Signed-off-by: kartik <kkartik@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
index efbbb87..4eda238 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
@@ -11,6 +11,7 @@
aliases {
mmc3 = "/bus@...mc@...0000";
serial0 = &tcu;
+ serial1 = &uarta;
};
chosen {
@@ -18,6 +19,13 @@
stdout-path = "serial0:115200n8";
};
+ bus@0 {
+ serial@...0000 {
+ compatible = "nvidia,tegra194-hsuart";
+ status = "okay";
+ };
+ };
+
serial {
status = "okay";
};
--
2.7.4
Powered by blists - more mailing lists