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Message-ID: <YelPnGM4kONm7ZQa@FVFF77S0Q05N>
Date: Thu, 20 Jan 2022 12:03:40 +0000
From: Mark Rutland <mark.rutland@....com>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: Christian Borntraeger <borntraeger@...ux.ibm.com>,
linux-kernel@...r.kernel.org,
Michael Ellerman <mpe@...erman.id.au>,
aleksandar.qemu.devel@...il.com, alexandru.elisei@....com,
anup.patel@....com, aou@...s.berkeley.edu, atish.patra@....com,
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dave.hansen@...ux.intel.com, frankja@...ux.ibm.com,
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Anup Patel <anup@...infault.org>,
Atish Patra <atishp@...shpatra.org>
Subject: Re: [PATCH v2 0/7] kvm: fix latent guest entry/exit bugs
On Thu, Jan 20, 2022 at 12:28:09PM +0100, Paolo Bonzini wrote:
> On 1/19/22 20:22, Mark Rutland wrote:
> > I wonder, is the s390 guest entry/exit*preemptible* ?
> >
> > If a timer IRQ can preempt in the middle of the EQS, we wouldn't balance
> > things before a ctx-switch to the idle thread, which would then be able
> > to hit this.
> >
> > I'll need to go audit the other architectures for similar.
>
> They don't enable interrupts in the entry/exit path so they should be okay.
True.
So it sounds like for s390 adding an explicit preempt_{disable,enable}() is the
right thing to do. I'll add that and explanatory commentary.
> RISC-V and x86 have an explicit preempt_disable/enable, while MIPS only has
> local_irq_disable/enable.
>
> (MIPS is a mess of dead code, I have patches to clean it up).
Sure; I haven't wrapped my head around ppc yet, but I assume they keep
interrupts disabled as with the other simple cases.
Thanks,
Mark.
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