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Message-ID: <mhng-21187529-2437-47dd-9506-9d877123b539@palmer-ri-x1c9>
Date: Thu, 20 Jan 2022 10:17:26 -0800 (PST)
From: Palmer Dabbelt <palmer@...belt.com>
To: jrtc27@...c27.com
CC: dimitri.ledkov@...onical.com, w6rz@...cast.net, robh+dt@...nel.org,
Paul Walmsley <paul.walmsley@...ive.com>,
aou@...s.berkeley.edu, plr.vincent@...il.com,
krzysztof.kozlowski@...onical.com, qiuwenbo@...inos.com.cn,
yash.shah@...ive.com, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: dts: sifive unmatched: Add gpio poweroff
On Fri, 31 Dec 2021 09:16:00 PST (-0800), jrtc27@...c27.com wrote:
> On 31 Dec 2021, at 16:49, Dimitri John Ledkov <dimitri.ledkov@...onical.com> wrote:
>>
>> However, in some configurations uboot loads kernel provided dtb, then this pin needs to be defines for SBI to provide poweroff via this pin.
>>
>> Kernel, uboot, opensbi dtbs for unmatched must be consistent with each other and all should define poweroff pin.
>
> U-Boot SPL loads its embedded DTB for OpenSBI’s use. U-Boot “proper”
> loads the kernel’s DTB for the kernel’s use. The DTB loaded for the
> kernel is never fed back somehow. Just as we don’t provide DDR timing
> information in the kernel DTB, only U-Boot’s, there should be no need
> to provide information about this GPIO to the kernel. Either the kernel
> will prioritise SBI power-off, which renders the DTB node a complete
> waste of space, and possibly confusing to exist, or the kernel will
> prioritise GPIO power-off, which should be discouraged as you’re
> supposed to use standardised firmware interfaces for these kinds of
> platform-specific things.
The DTs (and bindings, etc) in the kernel source tree are meant for more
than just the kernel's consumption. I know we have (and will likely
always have) some diff with the other consumers of device trees, but we
can at least try to get folks on the same page about small stuff like
this.
There is also some utility to having this visible to Linux: at a bare
minimum it lets us know that GPIO pin has an important function.
This patch is on for-next.
>
> Jess
>
>> On Fri, 31 Dec 2021, 06:58 James Clarke, <jrtc27@...c27.com> wrote:
>> On 31 Dec 2021, at 06:11, Ron Economos <w6rz@...cast.net> wrote:
>> >
>> > This patch is required for the following commit to work.
>> >
>> > commit f2928e224d85 ("riscv: set default pm_power_off to NULL")
>> >
>> > Signed-off-by: Ron Economos <w6rz@...cast.net>
>> > ---
>> > arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 +++++
>> > 1 file changed, 5 insertions(+)
>> >
>> > diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>> > index 6bfa1f24d3de..c4ed9efdff03 100644
>> > --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>> > +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>> > @@ -39,6 +39,11 @@ rtcclk: rtcclk {
>> > clock-frequency = <RTCCLK_FREQ>;
>> > clock-output-names = "rtcclk";
>> > };
>> > +
>> > + gpio-poweroff {
>> > + compatible = "gpio-poweroff";
>> > + gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
>> > + };
>>
>> Why? It’s abstracted by firmware, which works.
>>
>> Jess
>>
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