linux-kernel - Re: [PATCH] dt-bindings: watchdog: fsl-imx7ulp-wdt: Fix assigned-clock-parents

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Message-ID: <f1df742c-2f97-75d6-9fe2-4cc508dc9937@roeck-us.net>
Date:   Thu, 20 Jan 2022 11:58:46 -0800
From:   Guenter Roeck <linux@...ck-us.net>
To:     Rob Herring <robh@...nel.org>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Anson Huang <Anson.Huang@....com>
Cc:     linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: watchdog: fsl-imx7ulp-wdt: Fix
 assigned-clock-parents

On 1/20/22 9:23 AM, Rob Herring wrote:
> The schema has a typo with 'assigned-clocks-parents'. As it is not
> required to list assigned clocks in bindings, just drop the assigned-clocks
> property definitions to fix this.
> 
> Signed-off-by: Rob Herring <robh@...nel.org>

Acked-by: Guenter Roeck <linux@...ck-us.net>

> ---
>   .../devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml     | 8 +-------
>   1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> index fb603a20e396..4ca8a31359a5 100644
> --- a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
> @@ -29,12 +29,6 @@ properties:
>     clocks:
>       maxItems: 1
>   
> -  assigned-clocks:
> -    maxItems: 1
> -
> -  assigned-clocks-parents:
> -    maxItems: 1
> -
>     timeout-sec: true
>   
>   required:
> @@ -56,7 +50,7 @@ examples:
>           interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
>           clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
>           assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> -        assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
> +        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
>           timeout-sec = <40>;
>       };
>   
>