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Message-ID: <20220121131416.603972-9-eugen.hristev@microchip.com>
Date: Fri, 21 Jan 2022 15:14:13 +0200
From: Eugen Hristev <eugen.hristev@...rochip.com>
To: <robh+dt@...nel.org>, <linux-media@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<jacopo+renesas@...ndi.org>, <hverkuil-cisco@...all.nl>
CC: <nicolas.ferre@...rochip.com>, <sakari.ailus@....fi>,
<laurent.pinchart@...asonboard.com>,
Eugen Hristev <eugen.hristev@...rochip.com>
Subject: [PATCH v4 08/11] dt-bindings: media: microchip,xisc: add bus-width of 14
The Microchip XISC supports a bus width of 14 bits.
Add it to the supported bus widths.
Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
---
Documentation/devicetree/bindings/media/microchip,xisc.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
index 086e1430af4f..3be8f64c3e21 100644
--- a/Documentation/devicetree/bindings/media/microchip,xisc.yaml
+++ b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
@@ -67,7 +67,7 @@ properties:
remote-endpoint: true
bus-width:
- enum: [8, 9, 10, 11, 12]
+ enum: [8, 9, 10, 11, 12, 14]
default: 12
hsync-active:
--
2.25.1
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