lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sat, 22 Jan 2022 00:45:07 +0200
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Jean-Michel Hautbois <jeanmichel.hautbois@...asonboard.com>
Cc:     dave.stevenson@...pberrypi.com, devicetree@...r.kernel.org,
        kernel-list@...pberrypi.com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
        linux-rpi-kernel@...ts.infradead.org, lukasz@...y.st,
        mchehab@...nel.org, naush@...pberrypi.com, robh@...nel.org,
        tomi.valkeinen@...asonboard.com
Subject: Re: [RFC PATCH v2 5/7] ARM: dts: bcm2711: Add unicam CSI nodes

Hi Jean-Michel,

Thank you for the patch.

On Fri, Jan 21, 2022 at 09:18:08AM +0100, Jean-Michel Hautbois wrote:
> Add both MIPI CSI-2 nodes in the core bcm2711 tree. Use the 3-cells
> interrupt declaration, corresponding clocks and default as disabled.
> 
> Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@...asonboard.com>
> ---
>  arch/arm/boot/dts/bcm2711.dtsi | 31 +++++++++++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
> index dff18fc9a906..077141df7024 100644
> --- a/arch/arm/boot/dts/bcm2711.dtsi
> +++ b/arch/arm/boot/dts/bcm2711.dtsi
> @@ -3,6 +3,7 @@
>  
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/soc/bcm2835-pm.h>
> +#include <dt-bindings/power/raspberrypi-power.h>
>  
>  / {
>  	compatible = "brcm,bcm2711";
> @@ -293,6 +294,36 @@ hvs: hvs@...00000 {
>  			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> +		csi0: csi1@...00000 {

The node name should be csi@...00000, not csi1@...00000. Now, this will
probably cause issues with the firmware that looks for csi1 (and csi0 ?)
to hand over control of the Unicam CSI-2 receiver to the kernel. I
wonder if this is something that could be handled by a firmware update,
to also recognize nodes named "csi" ?

> +			compatible = "brcm,bcm2835-unicam";
> +			reg = <0x7e800000 0x800>,
> +			      <0x7e802000 0x4>;
> +			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clocks BCM2835_CLOCK_CAM0>,
> +				 <&firmware_clocks 4>;
> +			clock-names = "lp", "vpu";
> +			power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#clock-cells = <1>;

Why do you need #address-cells, #size-cells and #clock-cells ? They're
not mentioned in the binding.

> +			status="disabled";

Missing spaces around the =.

Same comment for the next node.

> +		};
> +
> +		csi1: csi1@...01000 {
> +			compatible = "brcm,bcm2835-unicam";
> +			reg = <0x7e801000 0x800>,
> +			      <0x7e802004 0x4>;
> +			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clocks BCM2835_CLOCK_CAM1>,
> +				 <&firmware_clocks 4>;
> +			clock-names = "lp", "vpu";
> +			power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#clock-cells = <1>;
> +			status="disabled";
> +		};
> +
>  		pixelvalve3: pixelvalve@...12000 {
>  			compatible = "brcm,bcm2711-pixelvalve3";
>  			reg = <0x7ec12000 0x100>;

-- 
Regards,

Laurent Pinchart

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ