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Message-ID: <CAFr9PXki+_qsPiX90ZaLcJeQhdo-rfUDMTL2D5Zv8Pk=G0Lo+w@mail.gmail.com>
Date: Sun, 23 Jan 2022 14:12:07 +0900
From: Daniel Palmer <daniel@...f.com>
To: Romain Perier <romain.perier@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
linux-clk <linux-clk@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Rob Herring <robh+dt@...nel.org>,
DTML <devicetree@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 8/9] ARM: mstar: Add OPP table for mercury5
Hi Romain,
On Sat, 22 Jan 2022 at 04:35, Romain Perier <romain.perier@...il.com> wrote:
>
> From: Daniel Palmer <daniel@...f.com>
>
> Add an OPP table for mercury5 so that cpu frequency scaling can
> happen.
>
> Signed-off-by: Daniel Palmer <daniel@...f.com>
> ---
> arch/arm/boot/dts/mstar-mercury5.dtsi | 36 +++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mstar-mercury5.dtsi b/arch/arm/boot/dts/mstar-mercury5.dtsi
> index a7d0dd9d6132..80a19bd23c9c 100644
> --- a/arch/arm/boot/dts/mstar-mercury5.dtsi
> +++ b/arch/arm/boot/dts/mstar-mercury5.dtsi
> @@ -6,6 +6,42 @@
>
> #include "mstar-v7.dtsi"
>
> +/ {
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + opp-microvolt = <800000 800000 850000>;
> + clock-latency-ns = <300000>;
> + };
> +
> + opp-200000000 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-microvolt = <850000 850000 880000>;
> + clock-latency-ns = <300000>;
> + };
> +
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <880000 880000 890000>;
> + clock-latency-ns = <300000>;
> + };
> + opp-600000000 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <900000 900000 1000000>;
> + clock-latency-ns = <300000>;
> + };
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <900000 900000 1000000>;
> + clock-latency-ns = <300000>;
> + };
> + };
> +};
> +
> &imi {
> reg = <0xa0000000 0x20000>;
> };
> --
> 2.34.1
>
I think we should drop this one when applying as the frequencies need
to be checked on the hardware again.
I think they should probably match the msc313e settings that Willy verified.
Cheers,
Daniel
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