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Message-Id: <20220123195239.509528-1-ayushranjan@google.com>
Date:   Sun, 23 Jan 2022 11:52:39 -0800
From:   Ayush Ranjan <ayushranjan@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>
Cc:     Ben Gardon <bgardon@...gle.com>, Jim Mattson <jmattson@...gle.com>,
        Andrei Vagin <avagin@...il.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Michael Pratt <mpratt@...gle.com>,
        Ayush Ranjan <ayushranjan@...gle.com>
Subject: [PATCH] x86: add additional EPT bit definitions

From: Michael Pratt <mpratt@...gle.com>

Used in gvisor for EPT support.

Tested: Builds cleanly
Signed-off-by: Ayush Ranjan <ayushranjan@...gle.com>
Signed-off-by: Michael Pratt <mpratt@...gle.com>
---
 arch/x86/include/asm/vmx.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 0ffaa3156a4e..c77ad687cdf7 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -496,7 +496,9 @@ enum vmcs_field {
 #define VMX_EPT_WRITABLE_MASK			0x2ull
 #define VMX_EPT_EXECUTABLE_MASK			0x4ull
 #define VMX_EPT_IPAT_BIT    			(1ull << 6)
-#define VMX_EPT_ACCESS_BIT			(1ull << 8)
+#define VMX_EPT_PSE_BIT				(1ull << 7)
+#define VMX_EPT_ACCESS_SHIFT			8
+#define VMX_EPT_ACCESS_BIT			(1ull << VMX_EPT_ACCESS_SHIFT)
 #define VMX_EPT_DIRTY_BIT			(1ull << 9)
 #define VMX_EPT_RWX_MASK                        (VMX_EPT_READABLE_MASK |       \
 						 VMX_EPT_WRITABLE_MASK |       \
-- 
2.35.0.rc0.227.g00780c9af4-goog

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