linux-kernel - [tip: x86/urgent] x86/MCE/AMD: Allow thresholding interface updates after init

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Date:   Sun, 23 Jan 2022 19:58:01 -0000
From:   "tip-bot2 for Yazen Ghannam" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Yazen Ghannam <yazen.ghannam@....com>,
        Borislav Petkov <bp@...e.de>, <stable@...r.kernel.org>,
        x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/MCE/AMD: Allow thresholding interface updates
 after init

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     1f52b0aba6fd37653416375cb8a1ca673acf8d5f
Gitweb:        https://git.kernel.org/tip/1f52b0aba6fd37653416375cb8a1ca673acf8d5f
Author:        Yazen Ghannam <yazen.ghannam@....com>
AuthorDate:    Mon, 17 Jan 2022 16:13:28 
Committer:     Borislav Petkov <bp@...e.de>
CommitterDate: Sun, 23 Jan 2022 20:50:18 +01:00

x86/MCE/AMD: Allow thresholding interface updates after init

Changes to the AMD Thresholding sysfs code prevents sysfs writes from
updating the underlying registers once CPU init is completed, i.e.
"threshold_banks" is set.

Allow the registers to be updated if the thresholding interface is
already initialized or if in the init path. Use the "set_lvt_off" value
to indicate if running in the init path, since this value is only set
during init.

Fixes: a037f3ca0ea0 ("x86/mce/amd: Make threshold bank setting hotplug robust")
Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: <stable@...r.kernel.org>
Link: https://lore.kernel.org/r/20220117161328.19148-1-yazen.ghannam@amd.com
---
 arch/x86/kernel/cpu/mce/amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index a1e2f41..9f4b508 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -423,7 +423,7 @@ static void threshold_restart_bank(void *_tr)
 	u32 hi, lo;
 
 	/* sysfs write might race against an offline operation */
-	if (this_cpu_read(threshold_banks))
+	if (!this_cpu_read(threshold_banks) && !tr->set_lvt_off)
 		return;
 
 	rdmsr(tr->b->address, lo, hi);