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Message-Id: <20220124084201.2699795-10-adrian.hunter@intel.com>
Date: Mon, 24 Jan 2022 10:41:45 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Jiri Olsa <jolsa@...hat.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Andi Kleen <ak@...ux.intel.com>, linux-kernel@...r.kernel.org
Subject: [PATCH 09/25] perf tools: Define Intel PT CFE / EVD event
Similar to other Intel PT synth events, define structures to hold CFE and
EVD data.
Signed-off-by: Adrian Hunter <adrian.hunter@...el.com>
---
tools/perf/util/event.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h
index c59331eea1d9..27ea7bd93df5 100644
--- a/tools/perf/util/event.h
+++ b/tools/perf/util/event.h
@@ -182,6 +182,7 @@ enum perf_synth_id {
PERF_SYNTH_INTEL_PWRX,
PERF_SYNTH_INTEL_CBR,
PERF_SYNTH_INTEL_PSB,
+ PERF_SYNTH_INTEL_EVT,
};
/*
@@ -280,6 +281,33 @@ struct perf_synth_intel_psb {
u64 offset;
};
+struct perf_synth_intel_evd {
+ union {
+ struct {
+ u8 evd_type;
+ u8 reserved[7];
+ };
+ u64 et;
+ };
+ u64 payload;
+};
+
+/* Intel PT Event Trace */
+struct perf_synth_intel_evt {
+ u32 padding;
+ union {
+ struct {
+ u32 type : 5,
+ reserved : 2,
+ ip : 1,
+ vector : 8,
+ evd_cnt : 16;
+ };
+ u32 cfe;
+ };
+ struct perf_synth_intel_evd evd[];
+};
+
/*
* raw_data is always 4 bytes from an 8-byte boundary, so subtract 4 to get
* 8-byte alignment.
--
2.25.1
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