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Message-ID: <DM5PR12MB185016F97740385594BBA396C05F9@DM5PR12MB1850.namprd12.prod.outlook.com>
Date: Tue, 25 Jan 2022 04:51:08 +0000
From: Akhil R <akhilrajeev@...dia.com>
To: Dmitry Osipenko <digetx@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Jonathan Hunter <jonathanh@...dia.com>,
Laxman Dewangan <ldewangan@...dia.com>,
"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
Mikko Perttunen <mperttunen@...dia.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"thierry.reding@...il.com" <thierry.reding@...il.com>
Subject: RE: [PATCH v3 2/4] arm64: tegra: Add Tegra234 I2C devicetree nodes
> 24.01.2022 14:18, Akhil R пишет:
> > Add device tree nodes for Tegra234 I2C controllers
> >
> > Signed-off-by: Akhil R <akhilrajeev@...dia.com>
> > ---
> > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 121
> > +++++++++++++++++++++++++++++++
> > 1 file changed, 121 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > index 6b6f1580..c686827 100644
> > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > @@ -144,6 +144,96 @@
> > status = "disabled";
> > };
> >
> > + gen1_i2c: i2c@...0000 {
> > + compatible = "nvidia,tegra194-i2c";
> > + reg = <0x3160000 0x100>;
> > + status = "disabled";
> > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> > + clock-frequency = <400000>;
> > + clocks = <&bpmp TEGRA234_CLK_I2C1
> > + &bpmp TEGRA234_CLK_PLLP_OUT0>;
> > + assigned-clocks = <&bpmp TEGRA234_CLK_I2C1>;
> > + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
> > + clock-names = "div-clk", "parent";
> > + resets = <&bpmp TEGRA234_RESET_I2C1>;
> > + reset-names = "i2c";
> > + };
>
> The patchset looks okay to me, thank you. I've one question:
>
> Could you please explain why the "PLLP" I2C timing configuration that is
> specified in the "example" section of Tegra TRM isn't suitable for T194/234?
> Why I2C Tegra kernel driver uses a different configuration?
The values in TRM are example settings. The values in driver are
more precise values based on characterization test results.
Regards,
Akhil
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