linux-kernel - Re: [PATCH v2] drm/edid: Support type 7 timings

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Date:   Tue, 25 Jan 2022 14:35:12 +0200
From:   Jani Nikula <jani.nikula@...ux.intel.com>
To:     Yaroslav Bolyukin <iam@...h.pw>, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org
Cc:     intel-gfx@...ts.freedesktop.org, Daniel Vetter <daniel@...ll.ch>,
        David Airlie <airlied@...ux.ie>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        Maxime Ripard <mripard@...nel.org>,
        Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
        Yaroslav Bolyukin <iam@...h.pw>
Subject: Re: [PATCH v2] drm/edid: Support type 7 timings

On Tue, 25 Jan 2022, Jani Nikula <jani.nikula@...ux.intel.com> wrote:
> On Sun, 23 Jan 2022, Yaroslav Bolyukin <iam@...h.pw> wrote:
>> Per VESA DisplayID Standard v2.0: Type VII Timing – Detailed Timing Data
>>
>> Definitions were already provided as type I, but not used
>>
>> Signed-off-by: Yaroslav Bolyukin <iam@...h.pw>
>
> Reviewed-by: Jani Nikula <jani.nikula@...el.com>

And pushed to drm-misc-next, thanks for the patch.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/drm_edid.c | 12 ++++++++----
>>  1 file changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index 12893e7be..5f2ae5bfa 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -5405,7 +5405,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
>>  }
>>  
>>  static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
>> -							    struct displayid_detailed_timings_1 *timings)
>> +							    struct displayid_detailed_timings_1 *timings,
>> +							    bool type_7)
>>  {
>>  	struct drm_display_mode *mode;
>>  	unsigned pixel_clock = (timings->pixel_clock[0] |
>> @@ -5426,7 +5427,8 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d
>>  	if (!mode)
>>  		return NULL;
>>  
>> -	mode->clock = pixel_clock * 10;
>> +	/* resolution is kHz for type VII, and 10 kHz for type I */
>> +	mode->clock = type_7 ? pixel_clock : pixel_clock * 10;
>>  	mode->hdisplay = hactive;
>>  	mode->hsync_start = mode->hdisplay + hsync;
>>  	mode->hsync_end = mode->hsync_start + hsync_width;
>> @@ -5457,6 +5459,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
>>  	int num_timings;
>>  	struct drm_display_mode *newmode;
>>  	int num_modes = 0;
>> +	bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING;
>>  	/* blocks must be multiple of 20 bytes length */
>>  	if (block->num_bytes % 20)
>>  		return 0;
>> @@ -5465,7 +5468,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector,
>>  	for (i = 0; i < num_timings; i++) {
>>  		struct displayid_detailed_timings_1 *timings = &det->timings[i];
>>  
>> -		newmode = drm_mode_displayid_detailed(connector->dev, timings);
>> +		newmode = drm_mode_displayid_detailed(connector->dev, timings, type_7);
>>  		if (!newmode)
>>  			continue;
>>  
>> @@ -5484,7 +5487,8 @@ static int add_displayid_detailed_modes(struct drm_connector *connector,
>>  
>>  	displayid_iter_edid_begin(edid, &iter);
>>  	displayid_iter_for_each(block, &iter) {
>> -		if (block->tag == DATA_BLOCK_TYPE_1_DETAILED_TIMING)
>> +		if (block->tag == DATA_BLOCK_TYPE_1_DETAILED_TIMING ||
>> +		    block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING)
>>  			num_modes += add_displayid_detailed_1_modes(connector, block);
>>  	}
>>  	displayid_iter_end(&iter);
>>
>> base-commit: 99613159ad749543621da8238acf1a122880144e

-- 
Jani Nikula, Intel Open Source Graphics Center