linux-kernel - [PATCH 2/2] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe

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Date:   Tue, 25 Jan 2022 18:42:25 +0530
From:   Aswath Govindraju <a-govindraju@...com>
To:     unlisted-recipients:; (no To-header on input)
CC:     <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Tero Kristo <kristo@...nel.org>,
        Vignesh Raghavendra <vigneshr@...com>,
        Nishanth Menon <nm@...com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Aswath Govindraju <a-govindraju@...com>
Subject: [PATCH 2/2] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe

x1 lane PCIe slot in the common processor board is enabled and connected to
J721S2 SOM. Add PCIe DT node in common processor board to reflect the
same.

Signed-off-by: Aswath Govindraju <a-govindraju@...com>
---
 .../boot/dts/ti/k3-j721s2-common-proc-board.dts    | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index cb99a97af426..793ee77838f4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -428,6 +428,20 @@
 	};
 };
 
+&pcie1_rc {
+	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
+	phys = <&serdes0_pcie_link>;
+	phy-names = "pcie-phy";
+	num-lanes = <1>;
+};
+
+&pcie1_ep {
+	phys = <&serdes0_pcie_link>;
+	phy-names = "pcie-phy";
+	num-lanes = <1>;
+	status = "disabled";
+};
+
 &mcu_mcan0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_mcan0_pins_default>;
-- 
2.17.1