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Message-ID: <61f06586.1c69fb81.890c7.4462@mx.google.com>
Date: Tue, 25 Jan 2022 22:02:59 +0100
From: Ansuel Smith <ansuelsmth@...il.com>
To: Stephen Boyd <sboyd@...nel.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Taniya Das <tdas@...eaurora.org>, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 11/15] dt-bindings: clock: add ipq8064 ce5 clk define
On Tue, Jan 25, 2022 at 12:47:26PM -0800, Stephen Boyd wrote:
> Quoting Ansuel Smith (2022-01-21 13:03:36)
> > Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
> >
> > Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> > ---
> > include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > index 7deec14a6dee..02262d2ac899 100644
> > --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > @@ -240,7 +240,7 @@
> > #define PLL14 232
> > #define PLL14_VOTE 233
> > #define PLL18 234
> > -#define CE5_SRC 235
> > +#define CE5_A_CLK 235
>
> Technically this is ABI and changing it is bad. I see that CE5_SRC isn't
> used though so I guess it's OK.
>
Consider that this naming comes directly from qsdk so I really don't
know why it was called SRC from the start.
> > #define CE5_H_CLK 236
> > #define CE5_CORE_CLK 237
> > #define CE3_SLEEP_CLK 238
> > @@ -283,5 +283,8 @@
> > #define EBI2_AON_CLK 281
> > #define NSSTCM_CLK_SRC 282
> > #define NSSTCM_CLK 283
> > +#define CE5_A_CLK_SRC 285
> > +#define CE5_H_CLK_SRC 286
> > +#define CE5_CORE_CLK_SRC 287
--
Ansuel
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