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Message-Id: <20220126175604.17919-4-romain.perier@gmail.com>
Date: Wed, 26 Jan 2022 18:55:59 +0100
From: Romain Perier <romain.perier@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>, Daniel Palmer <daniel@...f.com>,
Romain Perier <romain.perier@...il.com>,
Rob Herring <robh+dt@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 3/8] ARM: mstar: Add cpupll to base dtsi
From: Daniel Palmer <daniel@...f.com>
All MStar/SigmaStar ARMv7 SoCs have the CPU PLL at the same
place so add it to the base dtsi.
Signed-off-by: Daniel Palmer <daniel@...f.com>
Reviewed-by: Romain Perier <romain.perier@...il.com>
---
arch/arm/boot/dts/mstar-v7.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 89ebfe4f29da..2249faaa3aa7 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -155,6 +155,13 @@ mpll: mpll@...000 {
clocks = <&xtal>;
};
+ cpupll: cpupll@...400 {
+ compatible = "mstar,msc313-cpupll";
+ reg = <0x206400 0x200>;
+ #clock-cells = <0>;
+ clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
+ };
+
gpio: gpio@...800 {
#gpio-cells = <2>;
reg = <0x207800 0x200>;
--
2.34.1
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