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Message-Id: <20220126175604.17919-6-romain.perier@gmail.com>
Date: Wed, 26 Jan 2022 18:56:01 +0100
From: Romain Perier <romain.perier@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>, Daniel Palmer <daniel@...f.com>,
Romain Perier <romain.perier@...il.com>,
Rob Herring <robh+dt@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 5/8] ARM: mstar: Link cpupll to second core
From: Daniel Palmer <daniel@...f.com>
The second core also sources it's clock from the CPU PLL.
Signed-off-by: Daniel Palmer <daniel@...f.com>
Reviewed-by: Romain Perier <romain.perier@...il.com>
---
arch/arm/boot/dts/mstar-infinity2m.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi
index 6d4d1d224e96..dc339cd29778 100644
--- a/arch/arm/boot/dts/mstar-infinity2m.dtsi
+++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi
@@ -11,6 +11,8 @@ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
+ clocks = <&cpupll>;
+ clock-names = "cpuclk";
};
};
--
2.34.1
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