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Message-ID: <cef66664-192c-ab2f-2a3c-18c5d48b5093@mediatek.com>
Date: Thu, 27 Jan 2022 10:17:18 +0800
From: Macpaul Lin <macpaul.lin@...iatek.com>
To: Biao Huang <biao.huang@...iatek.com>,
David Miller <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
"Fabien Parent" <fparent@...libre.com>
CC: Jakub Kicinski <kuba@...nel.org>, Felix Fietkau <nbd@....name>,
"John Crispin" <john@...ozen.org>,
Sean Wang <sean.wang@...iatek.com>,
Mark Lee <Mark-MC.Lee@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
<netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Yinghua Pan <ot_yinghua.pan@...iatek.com>,
<srv_heupstream@...iatek.com>
Subject: Re: [PATCH net-next v2 8/9] net: ethernet: mtk-star-emac: add support
for MII interface
On 1/27/22 9:58 AM, Biao Huang wrote:
> Add support for MII interface.
> If user wants to use MII, assign "MII" to "phy-mode" property in dts.
>
> Signed-off-by: Biao Huang <biao.huang@...iatek.com>
> Signed-off-by: Yinghua Pan <ot_yinghua.pan@...iatek.com>
> ---
> drivers/net/ethernet/mediatek/mtk_star_emac.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c
> index d5e974e0db6d..167a019fd8f5 100644
> --- a/drivers/net/ethernet/mediatek/mtk_star_emac.c
> +++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c
> @@ -193,6 +193,7 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" };
> #define MTK_PERICFG_REG_NIC_CFG1_CON 0x03c8
> #define MTK_PERICFG_REG_NIC_CFG_CON_V2 0x0c10
> #define MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF GENMASK(3, 0)
> +#define MTK_PERICFG_BIT_NIC_CFG_CON_MII 0
> #define MTK_PERICFG_BIT_NIC_CFG_CON_RMII 1
> #define MTK_PERICFG_BIT_NIC_CFG_CON_CLK BIT(0)
> #define MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2 BIT(8)
> @@ -1463,6 +1464,7 @@ static int mtk_star_set_timing(struct mtk_star_priv *priv)
> unsigned int delay_val = 0;
>
> switch (priv->phy_intf) {
> + case PHY_INTERFACE_MODE_MII:
> case PHY_INTERFACE_MODE_RMII:
> delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_RX_CLK, priv->rx_inv);
> delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_TX_CLK, priv->tx_inv);
> @@ -1545,7 +1547,8 @@ static int mtk_star_probe(struct platform_device *pdev)
> ret = of_get_phy_mode(of_node, &priv->phy_intf);
> if (ret) {
> return ret;
> - } else if (priv->phy_intf != PHY_INTERFACE_MODE_RMII) {
> + } else if (priv->phy_intf != PHY_INTERFACE_MODE_RMII &&
> + priv->phy_intf != PHY_INTERFACE_MODE_MII) {
> dev_err(dev, "unsupported phy mode: %s\n",
> phy_modes(priv->phy_intf));
> return -EINVAL;
> @@ -1610,9 +1613,12 @@ static int mt8516_set_interface_mode(struct net_device *ndev)
> {
> struct mtk_star_priv *priv = netdev_priv(ndev);
> struct device *dev = mtk_star_get_dev(priv);
> - unsigned int intf_val, ret, rmii_rxc;
> + unsigned int intf_val, ret, rmii_rxc = 0;
>
> switch (priv->phy_intf) {
> + case PHY_INTERFACE_MODE_MII:
> + intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_MII;
> + break;
> case PHY_INTERFACE_MODE_RMII:
> intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
> rmii_rxc = priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK;
> @@ -1642,6 +1648,9 @@ static int mt8365_set_interface_mode(struct net_device *ndev)
> unsigned int intf_val;
>
> switch (priv->phy_intf) {
> + case PHY_INTERFACE_MODE_MII:
> + intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_MII;
> + break;
> case PHY_INTERFACE_MODE_RMII:
> intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
> intf_val |= priv->rmii_rxc ? 0 : MTK_PERICFG_BIT_NIC_CFG_CON_CLK_V2;
>
Reviewed-by: Macpaul Lin <macpaul.lin@...iatek.com>
Regards,
Macpaul Lin
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