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Message-ID: <20220127204115.384161-2-yazen.ghannam@amd.com>
Date: Thu, 27 Jan 2022 20:40:52 +0000
From: Yazen Ghannam <yazen.ghannam@....com>
To: <linux-edac@...r.kernel.org>
CC: <linux-kernel@...r.kernel.org>, <bp@...en8.de>,
<mchehab@...nel.org>, <tony.luck@...el.com>, <james.morse@....com>,
<rric@...nel.org>, <Smita.KoralahalliChannabasappa@....com>,
Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH v4 01/24] EDAC/amd64: Define Data Fabric operations
Define a stub to hold operations for different Data Fabric versions.
This will be filled in following patches.
Set the operations at init-time as appropriate for each model/family
group.
Also, start a glossary of acronyms used in the translation code.
Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
Link:
https://lore.kernel.org/r/20211028175728.121452-6-yazen.ghannam@amd.com
v3->v4:
* Started glossary.
* Included pr_debug() for failing case.
v2->v3:
* Was patch 6 in v2.
* "df_ops" is set at init time.
v1->v2:
* New in v2.
drivers/edac/amd64_edac.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index fba609ada0e6..639dfbea3348 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -988,6 +988,12 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr)
return csrow;
}
+/*
+ * Glossary of acronyms used in address translation for Zen-based systems
+ *
+ * DF = Data Fabric
+ */
+
/* Protect the PCI config register pairs used for DF indirect access. */
static DEFINE_MUTEX(df_indirect_mutex);
@@ -1058,6 +1064,14 @@ struct addr_ctx {
u8 inst_id;
};
+struct data_fabric_ops {
+};
+
+struct data_fabric_ops df2_ops = {
+};
+
+struct data_fabric_ops *df_ops;
+
static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
{
u64 dram_base_addr, dram_limit_addr, dram_hole_base;
@@ -1072,6 +1086,11 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
struct addr_ctx ctx;
+ if (!df_ops) {
+ pr_debug("Data Fabric Operations not set");
+ return -EINVAL;
+ }
+
memset(&ctx, 0, sizeof(ctx));
/* Start from the normalized address */
@@ -3958,6 +3977,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
fam_type = &family_types[F17_M10H_CPUS];
pvt->ops = &family_types[F17_M10H_CPUS].ops;
+ df_ops = &df2_ops;
break;
} else if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
fam_type = &family_types[F17_M30H_CPUS];
@@ -3976,6 +3996,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
case 0x18:
fam_type = &family_types[F17_CPUS];
pvt->ops = &family_types[F17_CPUS].ops;
+ df_ops = &df2_ops;
if (pvt->fam == 0x18)
family_types[F17_CPUS].ctl_name = "F18h";
--
2.25.1
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