[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220127204115.384161-7-yazen.ghannam@amd.com>
Date: Thu, 27 Jan 2022 20:40:57 +0000
From: Yazen Ghannam <yazen.ghannam@....com>
To: <linux-edac@...r.kernel.org>
CC: <linux-kernel@...r.kernel.org>, <bp@...en8.de>,
<mchehab@...nel.org>, <tony.luck@...el.com>, <james.morse@....com>,
<rric@...nel.org>, <Smita.KoralahalliChannabasappa@....com>,
Yazen Ghannam <yazen.ghannam@....com>
Subject: [PATCH v4 06/24] EDAC/amd64: Define function to add DRAM base and hole
Move adding of DRAM base and hole into a separate helper function.
Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
---
Link:
https://lore.kernel.org/r/20211028175728.121452-11-yazen.ghannam@amd.com
v3->v4:
* Include pr_debug() on failure.
v2->v3:
* Was patch 11 in v2.
v1->v2:
* Moved from arch/x86 to EDAC.
drivers/edac/amd64_edac.c | 43 +++++++++++++++++++++++----------------
1 file changed, 26 insertions(+), 17 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 9c61e3fa231a..350204eadb27 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1288,12 +1288,32 @@ static int denormalize_addr(struct addr_ctx *ctx)
return 0;
}
-static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
+static int add_base_and_hole(struct addr_ctx *ctx)
{
- u64 dram_base_addr, dram_limit_addr, dram_hole_base;
+ u64 dram_base_addr = (ctx->reg_base_addr & GENMASK_ULL(31, 12)) << 16;
+
+ /* Add dram base address */
+ ctx->ret_addr += dram_base_addr;
+
+ /* If legacy MMIO hole enabled */
+ if (ctx->reg_base_addr & BIT(1)) {
+ u32 dram_hole_base;
+
+ if (df_indirect_read_broadcast(ctx->nid, 0, 0x104, &dram_hole_base))
+ return -EINVAL;
+
+ dram_hole_base &= GENMASK(31, 24);
+ if (ctx->ret_addr >= dram_hole_base)
+ ctx->ret_addr += (BIT_ULL(32) - dram_hole_base);
+ }
+
+ return 0;
+}
+static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
+{
+ u64 dram_limit_addr;
u8 hashed_bit;
- u8 lgcy_mmio_hole_en;
struct addr_ctx ctx;
@@ -1330,22 +1350,11 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
goto out_err;
}
- lgcy_mmio_hole_en = ctx.reg_base_addr & BIT(1);
- dram_base_addr = (ctx.reg_base_addr & GENMASK_ULL(31, 12)) << 16;
-
dram_limit_addr = ((ctx.reg_limit_addr & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0);
- /* Add dram base address */
- ctx.ret_addr += dram_base_addr;
-
- /* If legacy MMIO hole enabled */
- if (lgcy_mmio_hole_en) {
- if (df_indirect_read_broadcast(nid, 0, 0x104, &ctx.tmp))
- goto out_err;
-
- dram_hole_base = ctx.tmp & GENMASK(31, 24);
- if (ctx.ret_addr >= dram_hole_base)
- ctx.ret_addr += (BIT_ULL(32) - dram_hole_base);
+ if (add_base_and_hole(&ctx)) {
+ pr_debug("Failed to add DRAM base address and hole");
+ goto out_err;
}
if (ctx.hash_enabled) {
--
2.25.1
Powered by blists - more mailing lists