linux-kernel - Re: [PATCH 1/2] arm64: dts: mt8192: add PWRAP node

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Message-ID: <8725f9cb-9c40-2d51-0a7b-96aaf80f7bdf@mediatek.com>
Date:   Thu, 27 Jan 2022 17:32:00 +0800
From:   Macpaul Lin <macpaul.lin@...iatek.com>
To:     Hui-Liu Liu <hui.liu@...iatek.com>, <lee.jones@...aro.org>,
        <robh+dt@...nel.org>, <matthias.bgg@...il.com>,
        <lgirdwood@...il.com>, <broonie@...nel.org>,
        <eddie.huang@...iatek.com>, <a.zummo@...ertech.it>,
        <alexandre.belloni@...tlin.com>, <fshao@...omium.org>
CC:     <srv_heupstream@...iatek.com>, <zhiyong.tao@...iatek.com>,
        <hsin-hsiung.wang@...iatek.com>, <sean.wang@...iatek.com>,
        <yuchen.huang@...iatek.com>, <wen.su@...iatek.com>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-rtc@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Wens Tsai <wenst@...omium.org>,
        Fabien Parent <fparent@...libre.com>,
        Rex-BC Chen <Rex-BC.Chen@...iatek.com>
Subject: Re: [PATCH 1/2] arm64: dts: mt8192: add PWRAP node

On 1/27/22 2:31 PM, Hui-Liu Liu wrote:
> From: Hui Liu <hui.liu@...iatek.com>
> 
> Add pwrap node.
> 
> Signed-off-by: Hui Liu <hui.liu@...iatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 53d790c335f9..9ef33dbf7a73 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -316,6 +316,18 @@ systimer: timer@...17000 {
>   			clock-names = "clk13m";
>   		};
>   
> +		pwrap: pwrap@...26000 {
> +			compatible = "mediatek,mt6873-pwrap";
> +			reg = <0 0x10026000 0 0x1000>;
> +			reg-names = "pwrap";
> +			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&infracfg CLK_INFRA_PMIC_AP>,
> +				 <&infracfg CLK_INFRA_PMIC_TMR>;
> +			clock-names = "spi", "wrap";
> +			assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
> +			assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
> +		};
> +
>   		scp_adsp: clock-controller@...20000 {
>   			compatible = "mediatek,mt8192-scp_adsp";
>   			reg = <0 0x10720000 0 0x1000>;
> 

Reviewed-by: Macpaul Lin <macpaul.lin@...iatek.com>

Regards,
Macpaul Lin