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Message-ID: <cover.1643355594.git.quic_saipraka@quicinc.com>
Date: Fri, 28 Jan 2022 13:17:07 +0530
From: Sai Prakash Ranjan <quic_saipraka@...cinc.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
CC: <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
Vinod Koul <vkoul@...nel.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Rajendra Nayak <quic_rjendra@...cinc.com>,
Prasad <quic_psodagud@...cinc.com>,
Sai Prakash Ranjan <quic_saipraka@...cinc.com>
Subject: [PATCHv2 0/9] soc: qcom: llcc: Add LLCC support for SM8450 SoC
This patch series adds support for LLCC on SM8450 SoC. It mainly
consists of LLCC driver changes to incorporate newer LLCC HW found
on SM8450 SoC and the corresponding DT bits to enable LLCC.
Based on qcom/for-next branch.
Changes in v2:
* Fix version assignment to drv_data.
Huang Yiwei (1):
soc: qcom: llcc: Add support for 16 ways of allocation
Sai Prakash Ranjan (8):
soc: qcom: llcc: Update the logic for version info extraction
soc: qcom: llcc: Add write-cache cacheable support
soc: qcom: llcc: Add missing llcc configuration data
soc: qcom: llcc: Update register offsets for newer LLCC HW
soc: qcom: llcc: Add configuration data for SM8450 SoC
dt-bindings: arm: msm: Add LLCC compatible for SM8350
dt-bindings: arm: msm: Add LLCC compatible for SM8450
arm64: dts: qcom: sm8450: Add LLCC/system-cache-controller node
.../bindings/arm/msm/qcom,llcc.yaml | 2 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 ++
drivers/soc/qcom/llcc-qcom.c | 102 +++++++++++++++---
include/linux/soc/qcom/llcc-qcom.h | 9 +-
4 files changed, 105 insertions(+), 15 deletions(-)
--
2.33.1
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