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Message-ID: <20220128124036.25fe0539@xps13>
Date: Fri, 28 Jan 2022 12:40:36 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Liang Yang <liang.yang@...ogic.com>
Cc: <linux-mtd@...ts.infradead.org>, Rob Herring <robh+dt@...nel.org>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Jerome Brunet <jbrunet@...libre.com>,
Neil Armstrong <narmstrong@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Kevin Hilman <khilman@...libre.com>,
Jianxin Pan <jianxin.pan@...ogic.com>,
Victor Wan <victor.wan@...ogic.com>,
XianWei Zhao <xianwei.zhao@...ogic.com>,
Kelvin Zhang <kelvin.zhang@...ogic.com>,
BiChao Zheng <bichao.zheng@...ogic.com>,
YongHui Yu <yonghui.yu@...ogic.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 1/2] mtd: rawnand: meson: discard the common MMC sub
clock framework
Hi Liang,
liang.yang@...ogic.com wrote on Fri, 28 Jan 2022 19:32:36 +0800:
> EMMC and NAND has the same clock control register named 'SD_EMMC_CLOCK' which is
have
> defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is the divider and
> bit6~7 is the mux for fix pll and xtal.
> Previously a common MMC sub clock framework is implemented and shared by EMMC and
I believe you meant that this hasa already been contributed? I would
then rephrase with:
A common MMC and NAND sub-clock has been implemented and can be used by
the eMMC and NAND controller (which are mutually exclusive anyway).
Let's use this new clock.
> NAND, but that is coupling the EMMC and NAND, although EMMC and NAND is mutually
> exclusive.
>
> Change-Id: Ibeb4c7ff886f5886aac4d6c664d7bbd1b1bcb997
No change Ids.
> Signed-off-by: Liang Yang <liang.yang@...ogic.com>
> ---
> drivers/mtd/nand/raw/meson_nand.c | 161 +++++++++++++++++-------------
> 1 file changed, 89 insertions(+), 72 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
> index ac3be92872d0..f6a3d5c2ea1c 100644
> --- a/drivers/mtd/nand/raw/meson_nand.c
> +++ b/drivers/mtd/nand/raw/meson_nand.c
> @@ -2,7 +2,7 @@
> /*
> * Amlogic Meson Nand Flash Controller Driver
> *
> - * Copyright (c) 2018 Amlogic, inc.
> + * Copyright (c) 2018-2021 Amlogic, inc.
Please don't.
> * Author: Liang Yang <liang.yang@...ogic.com>
> */
>
> @@ -10,6 +10,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
> #include <linux/clk.h>
> +#include <linux/clk-provider.h>
> #include <linux/mtd/rawnand.h>
> #include <linux/mtd/mtd.h>
> #include <linux/mfd/syscon.h>
> @@ -19,6 +20,7 @@
> #include <linux/iopoll.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> +#include <linux/of_address.h>
> #include <linux/sched/task_stack.h>
>
> #define NFC_REG_CMD 0x00
> @@ -104,6 +106,9 @@
>
> #define PER_INFO_BYTE 8
>
> +#define CLK_DIV_SHIFT 0
> +#define CLK_DIV_WIDTH 6
> +
> struct meson_nfc_nand_chip {
> struct list_head node;
> struct nand_chip nand;
> @@ -151,15 +156,17 @@ struct meson_nfc {
> struct nand_controller controller;
> struct clk *core_clk;
> struct clk *device_clk;
> - struct clk *phase_tx;
> - struct clk *phase_rx;
> + struct clk *nand_clk;
> + struct clk_divider nand_divider;
>
> unsigned long clk_rate;
> u32 bus_timing;
>
> struct device *dev;
> - void __iomem *reg_base;
> - struct regmap *reg_clk;
> + struct {
> + void __iomem *reg_base;
> + void __iomem *sd_emmc_clock;
> + } res;
Please split your commit: first the mechanical changes, then the use of
the new area or something like that.
Otherwise there are too many lines changed, I can't spot where it is
interesting.
Thanks,
Miquèl
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