| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20220129193646.372481-5-krzysztof.kozlowski@canonical.com>
Date: Sat, 29 Jan 2022 20:36:43 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Guenter Roeck <linux@...ck-us.net>,
Marek Szyprowski <m.szyprowski@...sung.com>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org
Subject: [PATCH 5/8] dt-bindings: phy: samsung,usb2-phy: convert to dtschema
Convert the Samsung SoC USB 2.0 PHY bindings to DT schema format.
Except the conversion, add also vbus-supply property which was already
used by the driver and DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
---
.../bindings/phy/samsung,usb2-phy.yaml | 102 ++++++++++++++++++
.../devicetree/bindings/phy/samsung-phy.txt | 60 -----------
MAINTAINERS | 2 +-
3 files changed, 103 insertions(+), 61 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
new file mode 100644
index 000000000000..056e270a4e88
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung S5P/Exynos SoC USB 2.0 PHY
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
+ - Marek Szyprowski <m.szyprowski@...sung.com>
+ - Sylwester Nawrocki <s.nawrocki@...sung.com>
+
+description: |
+ The first phandle argument in the PHY specifier identifies the PHY, its
+ meaning is compatible dependent. For the currently supported SoCs (Exynos4210
+ and Exynos4212) it is as follows::
+ 0 - USB device ("device"),
+ 1 - USB host ("host"),
+ 2 - HSIC0 ("hsic0"),
+ 3 - HSIC1 ("hsic1"),
+ Exynos3250 has only USB device phy available as phy 0.
+
+ Exynos4210 and Exynos4212 use mode switching and require that mode switch
+ register is supplied.
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos3250-usb2-phy
+ - samsung,exynos4210-usb2-phy
+ - samsung,exynos4x12-usb2-phy
+ - samsung,exynos5250-usb2-phy
+ - samsung,exynos5420-usb2-phy
+ - samsung,s5pv210-usb2-phy
+
+ clocks:
+ items:
+ - description: PHY module gate clock.
+ - description: Reference rate clock of PHY module.
+
+ clock-names:
+ items:
+ - const: phy
+ - const: ref
+
+ "#phy-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ samsung,pmureg-phandle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to PMU system controller interface.
+
+ samsung,sysreg-phandle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to system registers interface.
+
+ vbus-supply:
+ description:
+ VBUS power source.
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - "#phy-cells"
+ - reg
+ - samsung,pmureg-phandle
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,exynos4x12-usb2-phy
+ - samsung,exynos5250-usb2-phy
+ - samsung,exynos5420-usb2-phy
+ then:
+ required:
+ - samsung,sysreg-phandle
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5420.h>
+
+ phy@...30000 {
+ compatible = "samsung,exynos5420-usb2-phy";
+ reg = <0x12130000 0x100>;
+ #phy-cells = <1>;
+ clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
+ clock-names = "phy", "ref";
+ samsung,sysreg-phandle = <&sysreg_system_controller>;
+ samsung,pmureg-phandle = <&pmu_system_controller>;
+ };
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 839ffe2a2d05..d26ac7401258 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -1,63 +1,3 @@
-Samsung S5P/Exynos SoC series USB PHY
--------------------------------------------------
-
-Required properties:
-- compatible : should be one of the listed compatibles:
- - "samsung,exynos3250-usb2-phy"
- - "samsung,exynos4210-usb2-phy"
- - "samsung,exynos4x12-usb2-phy"
- - "samsung,exynos5250-usb2-phy"
- - "samsung,exynos5420-usb2-phy"
- - "samsung,s5pv210-usb2-phy"
-- reg : a list of registers used by phy driver
- - first and obligatory is the location of phy modules registers
-- samsung,sysreg-phandle - handle to syscon used to control the system registers
-- samsung,pmureg-phandle - handle to syscon used to control PMU registers
-- #phy-cells : from the generic phy bindings, must be 1;
-- clocks and clock-names:
- - the "phy" clock is required by the phy module, used as a gate
- - the "ref" clock is used to get the rate of the clock provided to the
- PHY module
-
-Optional properties:
-- vbus-supply: power-supply phandle for vbus power source
-
-The first phandle argument in the PHY specifier identifies the PHY, its
-meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
-and Exynos 4212) it is as follows:
- 0 - USB device ("device"),
- 1 - USB host ("host"),
- 2 - HSIC0 ("hsic0"),
- 3 - HSIC1 ("hsic1"),
-Exynos3250 has only USB device phy available as phy 0.
-
-Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
-register is supplied.
-
-Example:
-
-For Exynos 4412 (compatible with Exynos 4212):
-
-usbphy: phy@...b0000 {
- compatible = "samsung,exynos4x12-usb2-phy";
- reg = <0x125b0000 0x100>;
- clocks = <&clock 305>, <&clock 2>;
- clock-names = "phy", "ref";
- #phy-cells = <1>;
- samsung,sysreg-phandle = <&sys_reg>;
- samsung,pmureg-phandle = <&pmu_reg>;
-};
-
-Then the PHY can be used in other nodes such as:
-
-phy-consumer@...40000 {
- phys = <&usbphy 2>;
- phy-names = "phy";
-};
-
-Refer to DT bindings documentation of particular PHY consumer devices for more
-information about required PHYs and the way of specification.
-
Samsung SATA PHY Controller
---------------------------
diff --git a/MAINTAINERS b/MAINTAINERS
index ddcee331dc09..46f6ced8370a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17168,7 +17168,7 @@ SAMSUNG USB2 PHY DRIVER
M: Sylwester Nawrocki <s.nawrocki@...sung.com>
L: linux-kernel@...r.kernel.org
S: Supported
-F: Documentation/devicetree/bindings/phy/samsung-phy.txt
+F: Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
F: Documentation/driver-api/phy/samsung-usb2.rst
F: drivers/phy/samsung/phy-exynos4210-usb2.c
F: drivers/phy/samsung/phy-exynos4x12-usb2.c
--
2.32.0
Powered by blists - more mailing lists