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Message-ID: <45e1cbd1-d6dc-6341-399e-df53d5c48bd9@gmail.com>
Date: Sun, 30 Jan 2022 13:17:25 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Akhil R <akhilrajeev@...dia.com>, devicetree@...r.kernel.org,
dmaengine@...r.kernel.org, jonathanh@...dia.com,
kyarlagadda@...dia.com, ldewangan@...dia.com,
linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org,
p.zabel@...gutronix.de, rgumasta@...dia.com, robh+dt@...nel.org,
thierry.reding@...il.com, vkoul@...nel.org
Cc: Pavan Kunapuli <pkunapuli@...dia.com>
Subject: Re: [PATCH v17 2/4] dmaengine: tegra: Add tegra gpcdma driver
30.01.2022 13:13, Dmitry Osipenko пишет:
> 30.01.2022 13:08, Dmitry Osipenko пишет:
>> 30.01.2022 13:05, Dmitry Osipenko пишет:
>>> static int tegra_dma_device_resume(struct dma_chan *dc)
>>> {
>>> struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
>>> u32 val;
>>>
>>> if (!tdc->tdma->chip_data->hw_support_pause)
>>> return -ENOSYS;
>>>
>>> if (!tdc->dma_desc)
>>> return 0;
>>>
>>> val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
>>> val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
>>> tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
>>>
>>> enable_irq(tdc->irq);
>>
>> Correction:
>>
>> if (tdc->dma_desc) {
>> val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
>> val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
>> tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
>> }
>>
>> enable_irq(tdc->irq);
>
> And apparently, tegra_dma_terminate_all() also needs to take care of
> removing the PAUSE bit. Otherwise it won't be possible to unpause
> channel after the termination.
Although, will be easier to just do this in the resume:
val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
if (val & TEGRA_GPCDMA_CHAN_CSRE_PAUSE) {
val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
}
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