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Message-ID: <20220130184130.176646-8-terry.bowman@amd.com>
Date: Sun, 30 Jan 2022 12:41:28 -0600
From: Terry Bowman <terry.bowman@....com>
To: <terry.bowman@....com>, <linux@...ck-us.net>,
<linux-watchdog@...r.kernel.org>, <jdelvare@...e.com>,
<linux-i2c@...r.kernel.org>, <wsa@...nel.org>,
<andy.shevchenko@...il.com>, <rafael.j.wysocki@...el.com>
CC: <linux-kernel@...r.kernel.org>, <wim@...ux-watchdog.org>,
<rrichter@....com>, <thomas.lendacky@....com>,
<sudheesh.mavila@....com>, <Nehal-bakulchandra.Shah@....com>,
<Basavaraj.Natikar@....com>, <Shyam-sundar.S-k@....com>,
<Mario.Limonciello@....com>
Subject: [PATCH v4 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect
The EFCH SMBus controller's base address is determined using details in
FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].These
register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O
is no longer available in later AMD processors. Change base address
detection to use MMIO instead of port I/O cd6h/cd7h.
Signed-off-by: Terry Bowman <terry.bowman@....com>
---
drivers/i2c/busses/i2c-piix4.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 7defa0c5f1f9..a23c0327e1f6 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -344,10 +344,15 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev,
if (retval)
return retval;
- outb_p(smb_en, SB800_PIIX4_SMB_IDX);
- smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
- outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
- smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ if (mmio_cfg.use_mmio) {
+ smba_en_lo = ioread8(mmio_cfg.addr);
+ smba_en_hi = ioread8(mmio_cfg.addr + 1);
+ } else {
+ outb_p(smb_en, SB800_PIIX4_SMB_IDX);
+ smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
+ smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
+ }
piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);
--
2.30.2
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