linux-kernel - [PATCH] clk: rockchip: re-add rational best approximation algorithm to the fractional divider

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Message-Id: <20220131163224.708002-1-quentin.schulz@theobroma-systems.com>
Date:   Mon, 31 Jan 2022 17:32:24 +0100
From:   quentin.schulz@...obroma-systems.com
To:     unlisted-recipients:; (no To-header on input)
Cc:     mturquette@...libre.com, sboyd@...nel.org, heiko@...ech.de,
        andriy.shevchenko@...ux.intel.com, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Quentin Schulz <quentin.schulz@...obroma-systems.com>,
        stable@...r.kernel.org, Quentin Schulz <foss+kernel@...il.net>
Subject: [PATCH] clk: rockchip: re-add rational best approximation algorithm to the fractional divider

From: Quentin Schulz <quentin.schulz@...obroma-systems.com>

In commit 4e7cf74fa3b2 ("clk: fractional-divider: Export approximation
algorithm to the CCF users"), the code handling the rational best
approximation algorithm was replaced by a call to the core
clk_fractional_divider_general_approximation function which did the same
thing back then.

However, in commit 82f53f9ee577 ("clk: fractional-divider: Introduce
POWER_OF_TWO_PS flag"), this common code was made conditional on
CLK_FRAC_DIVIDER_POWER_OF_TWO_PS flag which was not added back to the
rockchip clock driver.

This broke the ltk050h3146w-a2 MIPI DSI display present on a PX30-based
downstream board.

Let's add the flag to the fractional divider flags so that the original
and intended behavior is brought back to the rockchip clock drivers.

Fixes: 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag")
Cc: stable@...r.kernel.org
Cc: Quentin Schulz <foss+kernel@...il.net>
Signed-off-by: Quentin Schulz <quentin.schulz@...obroma-systems.com>
---
 drivers/clk/rockchip/clk.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index b7be7e11b0df..bb8a844309bf 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -180,6 +180,7 @@ static void rockchip_fractional_approximation(struct clk_hw *hw,
 		unsigned long rate, unsigned long *parent_rate,
 		unsigned long *m, unsigned long *n)
 {
+	struct clk_fractional_divider *fd = to_clk_fd(hw);
 	unsigned long p_rate, p_parent_rate;
 	struct clk_hw *p_parent;
 
@@ -190,6 +191,8 @@ static void rockchip_fractional_approximation(struct clk_hw *hw,
 		*parent_rate = p_parent_rate;
 	}
 
+	fd->flags |= CLK_FRAC_DIVIDER_POWER_OF_TWO_PS;
+
 	clk_fractional_divider_general_approximation(hw, rate, parent_rate, m, n);
 }
 
-- 
2.34.1