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Message-ID: <CACPK8XdE-29O0WWJJXxdxygXCAb95UfQRwHqz11B-+d86tcJ+A@mail.gmail.com>
Date: Mon, 31 Jan 2022 06:28:46 +0000
From: Joel Stanley <joel@....id.au>
To: Jonathan Neuschäfer <j.neuschaefer@....net>
Cc: OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Damien Le Moal <damien.lemoal@....com>,
Hector Martin <marcan@...can.st>,
Arnd Bergmann <arnd@...db.de>,
Linus Walleij <linus.walleij@...aro.org>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] soc: nuvoton: Add SoC info driver for WPCM450
On Sat, 29 Jan 2022 at 14:34, Jonathan Neuschäfer <j.neuschaefer@....net> wrote:
>
> Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
> information such as the SoC revision.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
Reviewed-by: Joel Stanley <joel@....id.au>
> ---
>
> The "nuvoton,wpcm450-gcr" compatible string is defined in:
>
> [PATCH v5 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR)
> https://lore.kernel.org/lkml/20220129115228.2257310-2-j.neuschaefer@gmx.net/
> ---
> drivers/soc/Kconfig | 1 +
> drivers/soc/Makefile | 1 +
> drivers/soc/nuvoton/Kconfig | 11 ++++
> drivers/soc/nuvoton/Makefile | 2 +
> drivers/soc/nuvoton/wpcm450-soc.c | 90 +++++++++++++++++++++++++++++++
> 5 files changed, 105 insertions(+)
> create mode 100644 drivers/soc/nuvoton/Kconfig
> create mode 100644 drivers/soc/nuvoton/Makefile
> create mode 100644 drivers/soc/nuvoton/wpcm450-soc.c
>
> diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
> index a8562678c4370..310c7e3a17723 100644
> --- a/drivers/soc/Kconfig
> +++ b/drivers/soc/Kconfig
> @@ -13,6 +13,7 @@ source "drivers/soc/imx/Kconfig"
> source "drivers/soc/ixp4xx/Kconfig"
> source "drivers/soc/litex/Kconfig"
> source "drivers/soc/mediatek/Kconfig"
> +source "drivers/soc/nuvoton/Kconfig"
> source "drivers/soc/qcom/Kconfig"
> source "drivers/soc/renesas/Kconfig"
> source "drivers/soc/rockchip/Kconfig"
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index adb30c2d4feaa..f02c9b091a513 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -18,6 +18,7 @@ obj-y += ixp4xx/
> obj-$(CONFIG_SOC_XWAY) += lantiq/
> obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/
> obj-y += mediatek/
> +obj-y += nuvoton/
> obj-y += amlogic/
> obj-y += qcom/
> obj-y += renesas/
> diff --git a/drivers/soc/nuvoton/Kconfig b/drivers/soc/nuvoton/Kconfig
> new file mode 100644
> index 0000000000000..50166f37096b7
> --- /dev/null
> +++ b/drivers/soc/nuvoton/Kconfig
> @@ -0,0 +1,11 @@
> +# SPDX-License-Identifier: GPL-2.0
> +menuconfig WPCM450_SOC
> + bool "Nuvoton WPCM450 SoC driver"
> + default y if ARCH_WPCM450
> + select SOC_BUS
> + help
> + Say Y here to compile the SoC information driver for Nuvoton
> + WPCM450 SoCs.
> +
> + This driver provides information such as the SoC model and
> + revision.
> diff --git a/drivers/soc/nuvoton/Makefile b/drivers/soc/nuvoton/Makefile
> new file mode 100644
> index 0000000000000..e30317b4e8290
> --- /dev/null
> +++ b/drivers/soc/nuvoton/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +obj-$(CONFIG_WPCM450_SOC) += wpcm450-soc.o
> diff --git a/drivers/soc/nuvoton/wpcm450-soc.c b/drivers/soc/nuvoton/wpcm450-soc.c
> new file mode 100644
> index 0000000000000..e5723d6c933bc
> --- /dev/null
> +++ b/drivers/soc/nuvoton/wpcm450-soc.c
> @@ -0,0 +1,90 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Nuvoton WPCM450 SoC Identification
> + *
> + * Copyright (C) 2021 Jonathan Neuschäfer
> + */
> +
> +#include <linux/mfd/syscon.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/sys_soc.h>
> +#include <linux/slab.h>
> +
> +#define GCR_PDID 0
> +#define PDID_CHIP(x) ((x) & 0x00ffffff)
> +#define CHIP_WPCM450 0x926450
> +#define PDID_REV(x) ((x) >> 24)
> +
> +struct revision {
> + u8 number;
> + const char *name;
> +};
> +
> +const struct revision revisions[] __initconst = {
> + { 0x00, "Z1" },
> + { 0x03, "Z2" },
> + { 0x04, "Z21" },
> + { 0x08, "A1" },
> + { 0x09, "A2" },
> + { 0x0a, "A3" },
> + {}
> +};
> +
> +static const char * __init get_revision(u8 rev)
> +{
> + int i;
> +
> + for (i = 0; revisions[i].name; i++)
> + if (revisions[i].number == rev)
> + return revisions[i].name;
> + return NULL;
> +}
> +
> +static int __init wpcm450_soc_init(void)
> +{
> + struct soc_device_attribute *attr;
> + struct soc_device *soc;
> + const char *revision;
> + struct regmap *gcr;
> + u32 pdid;
> + int ret;
> +
> + if (!of_machine_is_compatible("nuvoton,wpcm450"))
> + return 0;
> +
> + gcr = syscon_regmap_lookup_by_compatible("nuvoton,wpcm450-gcr");
> + if (IS_ERR(gcr))
> + return PTR_ERR(gcr);
> + ret = regmap_read(gcr, GCR_PDID, &pdid);
> + if (ret)
> + return ret;
> +
> + if (PDID_CHIP(pdid) != CHIP_WPCM450) {
> + pr_warn("Unknown chip ID in GCR.PDID: 0x%06x\n", PDID_CHIP(pdid));
> + return -ENODEV;
> + }
> +
> + revision = get_revision(PDID_REV(pdid));
> + if (!revision) {
> + pr_warn("Unknown chip revision in GCR.PDID: 0x%02x\n", PDID_REV(pdid));
> + return -ENODEV;
> + }
> +
> + attr = kzalloc(sizeof(*attr), GFP_KERNEL);
> + if (!attr)
> + return -ENOMEM;
> +
> + attr->family = "Nuvoton NPCM";
> + attr->soc_id = "WPCM450";
> + attr->revision = revision;
> + soc = soc_device_register(attr);
> + if (IS_ERR(soc)) {
> + kfree(attr);
> + pr_warn("Could not register SoC device\n");
> + return PTR_ERR(soc);
> + }
> +
> + return 0;
> +}
> +device_initcall(wpcm450_soc_init);
> --
> 2.34.1
>
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