[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <38a02915-906f-c53-7e13-6c8710315e7@panix.com>
Date: Tue, 1 Feb 2022 14:25:10 -0800 (PST)
From: "Kenneth R. Crudup" <kenny@...ix.com>
To: Vidya Sagar <vidyas@...dia.com>
cc: bhelgaas@...gle.com, lorenzo.pieralisi@....com,
hkallweit1@...il.com, wangxiongfeng2@...wei.com,
mika.westerberg@...ux.intel.com, kai.heng.feng@...onical.com,
chris.packham@...iedtelesis.co.nz, yangyicong@...ilicon.com,
treding@...dia.com, jonathanh@...dia.com, abhsahu@...dia.com,
sagupta@...dia.com, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, kthota@...dia.com,
mmaddireddy@...dia.com, sagar.tv@...il.com,
"Kenneth R. Crudup" <kenny@...ix.com>
Subject: Re: [PATCH V1] PCI/ASPM: Save/restore L1SS Capability for
suspend/resume
On Wed, 2 Feb 2022, Vidya Sagar wrote:
> BTW, I see that the ASPM L1SS capability is supported by only two endpoints
> viz. KIOXIA's NVMe drive and Realtek's Card reader. None of the root ports
> seem to have the support. So, I'm wondering how was it even getting enabled in
> the first place earlier?
> (OR)
> was it the case that L1SS sub-states were never enabled earlier also and the
> issue was occurring without having ASPM L1SS enabled? (but with only L0s and
> L1 enabled??)
I'm not proficient enough in PCIe to be able to be sure of the answers to those-
what can/could I do to determine this?
> Also, I see that from 'before' and 'after' logs that for both NVMe and Card
> reader and their corresponding root ports, none of the ASPM states are enabled
> (not even L0s or L1).
> Did you set the policy to 'powersupersave' before hibernating the system?
Yeah:
CONFIG_PCIEASPM_POWER_SUPERSAVE=y
My laptop loses ~1.5%/hr in S3; I was trying anything I could to reduce that,
if possible.
-Kenny
--
Kenneth R. Crudup / Sr. SW Engineer, Scott County Consulting, Orange County CA
Powered by blists - more mailing lists