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Message-ID: <CAMZfGtVWZ0toBGFrPqLkx9aGdZW1bWfQxTgBMzM=pRweqE_FHw@mail.gmail.com>
Date: Tue, 1 Feb 2022 21:24:12 +0800
From: Muchun Song <songmuchun@...edance.com>
To: Andrew Morton <akpm@...ux-foundation.org>, zi.yan@...rutgers.edu,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
David Rientjes <rientjes@...gle.com>,
Lars Persson <lars.persson@...s.com>,
Mike Kravetz <mike.kravetz@...cle.com>
Cc: Linux Memory Management List <linux-mm@...ck.org>,
LKML <linux-kernel@...r.kernel.org>,
Xiongchun duan <duanxiongchun@...edance.com>,
Zi Yan <ziy@...dia.com>
Subject: Re: [PATCH v3 2/5] mm: fix missing cache flush for all tail pages of
compound page
On Tue, Feb 1, 2022 at 12:04 AM Muchun Song <songmuchun@...edance.com> wrote:
>
> The D-cache maintenance inside move_to_new_page() only consider one page,
> there is still D-cache maintenance issue for tail pages of compound page
> (e.g. THP or HugeTLB). THP migration is only enabled on x86_64, ARM64
> and powerpc, while powerpc and arm64 need to maintain the consistency
> between I-Cache and D-Cache, which depends on flush_dcache_page() to
> maintain the consistency between I-Cache and D-Cache. In theory, the
> issue can be found on arm64 and powerpc.
My bad. I have looked at the code closely on arm64 and powerpc. There
should be no issues since their icache flushing function already considers
the compound pages. I'll update the commit log in the next version.
> HugeTLB migration is enabled
> on arm, arm64, mips, parisc, powerpc, riscv, s390 and sh, while arm
> has handled the compound page cache flush in flush_dcache_page(), but
> most others do not. In theory, the issue exists on many architectures.
> Fix this by not using flush_dcache_folio() since it is not backportable.
>
> Fixes: 616b8371539a ("mm: thp: enable thp migration in generic path")
This Fixes tag will be removed in the next version.
> Fixes: 290408d4a250 ("hugetlb: hugepage migration core")
> Signed-off-by: Muchun Song <songmuchun@...edance.com>
> Reviewed-by: Zi Yan <ziy@...dia.com>
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