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Date: Wed, 2 Feb 2022 13:23:47 -0800
From: Douglas Anderson <dianders@...omium.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: pmaliset@...eaurora.org, mka@...omium.org,
quic_rjendra@...cinc.com,
Shaik Sajida Bhanu <sbhanu@...eaurora.org>,
kgodara@...eaurora.org, konrad.dybcio@...ainline.org,
Sankeerth Billakanti <quic_sbillaka@...cinc.com>,
sibis@...eaurora.org, swboyd@...omium.org,
Douglas Anderson <dianders@...omium.org>,
Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3 13/14] arm64: dts: qcom: sc7280: Add the CPU compatible to the soc@0 node
We'd like to start including the CPU name as the compatible under the
"soc" node so that we can get rid of it from the top-level compatible
string.
Suggested-by: Stephen Boyd <swboyd@...omium.org>
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
Probably needs a .yaml file somewhere?
Changes in v3:
- ("sc7280: Add the CPU compatible to the soc@0 node") new for v3.
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 618ae0407cd6..2bfc919d4018 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -573,7 +573,7 @@ soc: soc@0 {
#size-cells = <2>;
ranges = <0 0 0 0 0x10 0>;
dma-ranges = <0 0 0 0 0x10 0>;
- compatible = "simple-bus";
+ compatible = "qcom,sc7280", "simple-bus";
gcc: clock-controller@...000 {
compatible = "qcom,gcc-sc7280";
--
2.35.0.rc2.247.g8bbb082509-goog
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