linux-kernel - Re: [PATCH 14/31] clk: mediatek: pll: Clean up included headers

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Date:   Wed, 2 Feb 2022 20:58:08 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Miles Chen <miles.chen@...iatek.com>
Cc:     chun-jie.chen@...iatek.com, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, matthias.bgg@...il.com,
        mturquette@...libre.com, sboyd@...nel.org
Subject: Re: [PATCH 14/31] clk: mediatek: pll: Clean up included headers

On Wed, Jan 26, 2022 at 2:36 PM Miles Chen <miles.chen@...iatek.com> wrote:
>
> > Some included headers aren't actually used anywhere, while other headers
> > with the declaration of functions and structures aren't directly
> > included.
> >
> > Get rid of the unused ones, and add the ones that should be included
> > directly.
> >
> > Also, expand the MHZ macro with spelled-out "1000 * 1000" to be able
> > to not include clk-mtk.h. The existing ternary operator is rewritten
> > in a shortened form to accommodate the expanded macro.
>
> I think MHZ is more human readable than 1000*1000,
> like SZ_4K in linux/sizes.h.
>
> MHZ is also use by other clk-mtxxxx.c (by including clk-mtk.h)
> , so maybe we should keep clk-mtk.h?

This seems like overkill. I'll define MHZ in the file instead.

ChenYu

> Miles
> >
> > Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> > ---
> >  drivers/clk/mediatek/clk-pll.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c
> > index 081e0df8203e..9698d1c97cd6 100644
> > --- a/drivers/clk/mediatek/clk-pll.c
> > +++ b/drivers/clk/mediatek/clk-pll.c
> > @@ -4,15 +4,15 @@
> >   * Author: James Liao <jamesjj.liao@...iatek.com>
> >   */
> >
> > -#include <linux/of.h>
> > -#include <linux/of_address.h>
> > +#include <linux/clk-provider.h>
> > +#include <linux/container_of.h>
> > +#include <linux/delay.h>
> > +#include <linux/err.h>
> >  #include <linux/io.h>
> >  #include <linux/module.h>
> > +#include <linux/of_address.h>
> >  #include <linux/slab.h>
> > -#include <linux/clkdev.h>
> > -#include <linux/delay.h>
> >
> > -#include "clk-mtk.h"
> >  #include "clk-pll.h"
> >
> >  #define REG_CON0             0
> > @@ -162,7 +162,7 @@ static void mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw,
> >  static void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv,
> >               u32 freq, u32 fin)
> >  {
> > -     unsigned long fmin = pll->data->fmin ? pll->data->fmin : (1000 * MHZ);
> > +     unsigned long fmin = pll->data->fmin ?: (1000 * 1000 * 1000);
> >       const struct mtk_pll_div_table *div_table = pll->data->div_table;
> >       u64 _pcw;
> >       int ibits;
> > --
> > 2.35.0.rc0.227.g00780c9af4-goog
>
>