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Message-Id: <20220203194308.2469117-2-jmattson@google.com>
Date: Thu, 3 Feb 2022 11:43:08 -0800
From: Jim Mattson <jmattson@...gle.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Tony Luck <tony.luck@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
"Chang S. Bae" <chang.seok.bae@...el.com>,
Jim Mattson <jmattson@...gle.com>,
Juergen Gross <jgross@...e.com>,
Andrew Cooper <andrew.cooper3@...rix.com>,
Babu Moger <babu.moger@....com>,
Jing Liu <jing2.liu@...el.com>,
Sean Christopherson <seanjc@...gle.com>,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/2] x86/cpufeatures: Add macros for Intel's new fast rep
string features
Even if no one else cares, these features should be exposed to kvm
guests, and the code for the KVM_GET_SUPPORTED_CPUID ioctl is more
readable if the bits have corresponding X86_FEATURE macros.
Signed-off-by: Jim Mattson <jmattson@...gle.com>
---
arch/x86/include/asm/cpufeatures.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index d7b51ddc8db3..138a50bc7bbd 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -299,6 +299,9 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_FZRM (12*32+10) /* Fast zero-length REP MOVSB */
+#define X86_FEATURE_FSRS (12*32+11) /* Fast short REP STOSB */
+#define X86_FEATURE_FSRC (12*32+12) /* Fast short REP {CMPSB,SCASB} */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
--
2.35.0.263.gb82422642f-goog
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