linux-kernel - Re: (subset) [PATCH v4] arm64: dts: qcom: sc7280: Add herobrine-r1

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Date:   Fri,  4 Feb 2022 16:37:40 -0600
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Douglas Anderson <dianders@...omium.org>
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, konrad.dybcio@...ainline.org,
        mka@...omium.org, Andy Gross <agross@...nel.org>,
        pmaliset@...eaurora.org, quic_rjendra@...cinc.com,
        Shaik Sajida Bhanu <sbhanu@...eaurora.org>,
        kgodara@...eaurora.org, sibis@...eaurora.org,
        Sankeerth Billakanti <quic_sbillaka@...cinc.com>,
        Rob Herring <robh+dt@...nel.org>, swboyd@...omium.org
Subject: Re: (subset) [PATCH v4] arm64: dts: qcom: sc7280: Add herobrine-r1

On Fri, 4 Feb 2022 14:06:07 -0800, Douglas Anderson wrote:
> Add the new herobrine-r1. Note that this is pretty much a re-design
> compared to herobrine-r0 so we don't attempt any dtsi to share stuff
> between them.
> 
> This patch attempts to define things at 3 levels:
> 
> 1. The Qcard level. Herobrine includes a Qcard PCB and the Qcard PCB
>    is supposed to be the same (modulo stuffing options) across
>    multiple boards, so trying to define what's there hopefully makes
>    sense. NOTE that newer "CRD" boards from Qualcomm also use
>    Qcard. When support for CRD3 is added hopefully it can use the
>    Qcard include (and perhaps we should even evaluate it using
>    herobrine.dtsi?)
> 2. The herobrine "baseboard" level. Right now most stuff is here with
>    the exception of things that we _know_ will be different per
>    board. We know that not all boards will have the same set of eMMC,
>    nvme, and SD. We also know that the exact pin names are likely to
>    be different.
> 3. The actual "board" level, AKA herobrine-rev1.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: sc7280: Add herobrine-r1
      commit: 116f7cc43d28ccd621ff1fecc9526c65dde28dcd

Best regards,
-- 
Bjorn Andersson <bjorn.andersson@...aro.org>