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Message-ID: <Yf2wiMTUV6XUqWh0@robh.at.kernel.org>
Date: Fri, 4 Feb 2022 17:02:32 -0600
From: Rob Herring <robh@...nel.org>
To: Marc Zyngier <maz@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
Will Deacon <will@...nel.org>,
Hector Martin <marcan@...can.st>,
Sven Peter <sven@...npeter.dev>,
Alyssa Rosenzweig <alyssa@...enzweig.io>,
Thomas Gleixner <tglx@...utronix.de>,
Dougall <dougallj@...il.com>, kernel-team@...roid.com
Subject: Re: [PATCH v4 03/10] dt-bindings: apple,aic: Add affinity
description for per-cpu pseudo-interrupts
On Mon, Jan 24, 2022 at 08:12:24PM +0000, Marc Zyngier wrote:
> Some of the FIQ per-cpu pseudo-interrupts are better described with
> a specific affinity, the most obvious candidate being the CPU PMUs.
>
> Augment the AIC binding to be able to specify that affinity in the
> interrupt controller node.
>
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> ---
> .../interrupt-controller/apple,aic.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> index c7577d401786..d97683eb2c54 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> @@ -70,6 +70,33 @@ properties:
> power-domains:
> maxItems: 1
>
> + affinities:
> + type: object
additionalProperties: false
> + description:
> + FIQ affinity can be expressed as a single "affinities" node,
> + containing a set of sub-nodes, one per FIQ with a non-default
> + affinity.
> + patternProperties:
> + "^.+-affinity$":
> + type: object
additionalProperties: false
> + properties:
> + fiq-index:
apple,fiq-index
With that,
Reviewed-by: Rob Herring <robh@...nel.org>
> + description:
> + The interrupt number specified as a FIQ, and for which
> + the affinity is not the default.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 5
> +
> + cpus:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Should be a list of phandles to CPU nodes (as described in
> + Documentation/devicetree/bindings/arm/cpus.yaml).
> +
> + required:
> + - fiq-index
> + - cpus
> +
> required:
> - compatible
> - '#interrupt-cells'
> --
> 2.30.2
>
>
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