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Message-ID: <Yf24nR9drkBAnYA5@robh.at.kernel.org>
Date: Fri, 4 Feb 2022 17:37:01 -0600
From: Rob Herring <robh@...nel.org>
To: Dipen Patel <dipenp@...dia.com>
Cc: smangipudi@...dia.com, thierry.reding@...il.com,
jonathanh@...dia.com, linux-kernel@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-gpio@...r.kernel.org,
linus.walleij@...aro.org, bgolaszewski@...libre.com,
warthog618@...il.com, devicetree@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: Re: [PATCH v4 04/11] dt-bindings: Add HTE bindings
On Tue, Feb 01, 2022 at 02:26:23PM -0800, Dipen Patel wrote:
> Introduces HTE devicetree binding details for the HTE subsystem. It
> includes examples for the consumers, binding details for the providers
> and specific binding details for the Tegra194 based HTE providers.
>
> Signed-off-by: Dipen Patel <dipenp@...dia.com>
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> ---
> .../hte/hardware-timestamps-common.yaml | 29 +++++++
> .../devicetree/bindings/hte/hte-consumer.yaml | 44 ++++++++++
> .../bindings/hte/nvidia,tegra194-hte.yaml | 82 +++++++++++++++++++
> 3 files changed, 155 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml
> create mode 100644 Documentation/devicetree/bindings/hte/hte-consumer.yaml
> create mode 100644 Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml
>
> diff --git a/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml b/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml
> new file mode 100644
> index 000000000000..ee6f94890695
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hte/hardware-timestamps-common.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hte/hardware-timestamps-common.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hardware timestamp providers
> +
> +maintainers:
> + - Dipen Patel <dipenp@...dia.com>
> +
> +description: |
> + Some devices/SoCs have hardware time stamping engines which can use hardware
> + means to timestamp entity in realtime. The entity could be anything from
> + GPIOs, IRQs, Bus and so on. The hardware timestamp engine (HTE) present
> + itself as a provider with the bindings described in this document.
> +
> +properties:
> + $nodename:
> + pattern: "^hardware-timestamp(@.*|-[0-9a-f])?$"
> +
> + "#hardware-timestamp-cells":
> + description:
> + Number of cells in a HTE specifier.
> +
> +required:
> + - "#hardware-timestamp-cells"
> +
> +additionalProperties: true
> diff --git a/Documentation/devicetree/bindings/hte/hte-consumer.yaml b/Documentation/devicetree/bindings/hte/hte-consumer.yaml
> new file mode 100644
> index 000000000000..bb1232b31455
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hte/hte-consumer.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: GPL-2.0
dual license
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hte/hte-consumer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HTE Consumer Device Tree Bindings
> +
> +maintainers:
> + - Dipen Patel <dipenp@...dia.com>
select: true
Or this is never applied.
> +
> +description: |
> + HTE properties should be named "hardware-timestamps". The exact meaning of
> + each hardware-timestamps property must be documented in the device tree
> + binding for each device. An optional property "hardware-timestamp-names" may
> + contain a list of strings to label each of the HTE devices listed in the
> + "hardware-timestamps" property.
> +
> +properties:
> + hardware-timestamps:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + The list of HTE provider phandle. The provider must document the number
> + of cell that must be passed in this property along with phandle.
> +
> + hardware-timestamp-names:
> + $ref: /schemas/types.yaml#/definitions/string-array
> + description:
> + An optional string property.
> +
> +required:
> + - hardware-timestamps
And drop this or it will then fail everywhere.
> +
> +dependencies:
> + hardware-timestamp-names: [ hardware-timestamps ]
> +
> +additionalProperties: true
> +
> +examples:
> + - |
> + hte_irq_consumer {
> + hardware-timestamps = <&tegra_hte_lic 0x19>;
> + hardware-timestamp-names = "hte-irq";
> + };
> diff --git a/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml
> new file mode 100644
> index 000000000000..c7d2acdb862e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: GPL-2.0
Dual license.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hte/nvidia,tegra194-hte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Tegra194 on chip generic hardware timestamping engine (HTE)
> +
> +maintainers:
> + - Dipen Patel <dipenp@...dia.com>
> +
> +description: |
Don't need '|' if no formatting.
> + Tegra194 SoC has multiple generic hardware timestamping engines (GTE) which
> + can monitor subset of GPIO and on chip IRQ lines for the state change, upon
> + detection it will record timestamp (taken from system counter) in its
> + internal hardware FIFO. It has a bitmap array arranged in 32bit slices where
> + each bit represent signal/line to enable or disable for the hardware
> + timestamping.
> +
> +properties:
> + compatible:
> + enum:
> + - nvidia,tegra194-gte-aon
> + - nvidia,tegra194-gte-lic
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + nvidia,int-threshold:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + HTE device generates its interrupt based on this u32 FIFO threshold
> + value. The recommended value is 1.
> + minimum: 1
> + maximum: 256
> +
> + nvidia,slices:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + HTE lines are arranged in 32 bit slice where each bit represents different
> + line/signal that it can enable/configure for the timestamp. It is u32
> + property and depends on the HTE instance in the chip. The value 3 is for
> + GPIO GTE and 11 for IRQ GTE.
> + enum: [3, 11]
> +
> + '#hardware-timestamp-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - nvidia,slices
> + - "#hardware-timestamp-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + tegra_hte_aon: hardware-timestamp@...0000 {
> + compatible = "nvidia,tegra194-gte-aon";
> + reg = <0xc1e0000 0x10000>;
> + interrupts = <0 13 0x4>;
> + nvidia,int-threshold = <1>;
> + nvidia,slices = <3>;
> + #hardware-timestamp-cells = <1>;
> + };
> +
> + - |
> + tegra_hte_lic: hardware-timestamp@...0000 {
> + compatible = "nvidia,tegra194-gte-lic";
> + reg = <0x3aa0000 0x10000>;
> + interrupts = <0 11 0x4>;
> + nvidia,int-threshold = <1>;
> + nvidia,slices = <11>;
> + #hardware-timestamp-cells = <1>;
> + };
> +
> +...
> --
> 2.17.1
>
>
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