linux-kernel - [PATCH 4/6] ARM: dts: r9a06g032: Add the watchdog nodes

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Message-ID: <20220204161806.3126321-5-jjhiblot@traphandler.com>
Date:   Fri, 4 Feb 2022 17:18:02 +0100
From:   Jean-Jacques Hiblot <jjhiblot@...phandler.com>
To:     <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>
CC:     Jean-Jacques Hiblot <jjhiblot@...phandler.com>,
        <linux-renesas-soc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH 4/6] ARM: dts: r9a06g032: Add the watchdog nodes

This SOC includes 2 watchdog controllers (one per A7 core).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@...phandler.com>
---
 arch/arm/boot/dts/r9a06g032.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index c47896e4ab58..54c91b46a5d0 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -184,6 +184,22 @@ gic: interrupt-controller@...01000 {
 			interrupts =
 				<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
+
+		wdt0: watchdog@...08000 {
+			compatible = "renesas,rzn1-wdt";
+			reg = <0x40008000 0x1000>;
+			interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+			status = "disabled";
+		};
+
+		wdt1: watchdog@...09000 {
+			compatible = "renesas,rzn1-wdt";
+			reg = <0x40009000 0x1000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+			status = "disabled";
+		};
 	};
 
 	timer {
-- 
2.25.1