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Message-ID: <20220204192128.GA785175@iweiny-DESK2.sc.intel.com>
Date: Fri, 4 Feb 2022 11:21:28 -0800
From: Ira Weiny <ira.weiny@...el.com>
To: Dave Hansen <dave.hansen@...el.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>,
Dan Williams <dan.j.williams@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V8 07/44] x86/pkeys: Add PKS CPU feature bit
On Fri, Jan 28, 2022 at 03:05:36PM -0800, Dave Hansen wrote:
> On 1/27/22 09:54, ira.weiny@...el.com wrote:
> > From: Ira Weiny <ira.weiny@...el.com>
> >
> > Protection Keys for Supervisor pages (PKS) enables fast, hardware thread
> > specific, manipulation of permission restrictions on supervisor page
>
> Nit: should be "hardware-thread-specific".
>
> > mappings. It uses the same mechanism of Protection Keys as those on
> > User mappings but applies that mechanism to supervisor mappings using a
> > supervisor specific MSR.
>
> "supervisor-specific"
>
> Memory Protection Keys (pkeys) provides a mechanism for
> enforcing page-based protections, but without requiring
> modification of the page tables when an application changes
> protection domains.
>
> The kernel currently supports the pkeys for userspace (PKU)
> architecture. That architecture has been extended to
> additionally support supervisor mappings. The supervisor
> support is referred to as PKS.
>
> I probably wouldn't mention the MSR unless you want to say:
>
> The main difference between PKU and PKS is that PKS does not
> introduce any new instructions to write to its register. The
> register is exposed as a normal MSR and is accessed with the
> normal MSR instructions.
>
>
> > The CPU indicates support for PKS in bit 31 of the ECX register after a
> > cpuid instruction.
>
> I'd just remove this sentence. We don't need to rehash each tiny morsel
> of the architecture in a commit message.
All done. Thanks for the verbiage.
Ira
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