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Message-ID: <ad0493ac-af20-f207-9333-561042d7fc49@amlogic.com>
Date:   Mon, 7 Feb 2022 22:19:03 +0800
From:   Yu Tu <yu.tu@...ogic.com>
To:     Kevin Hilman <khilman@...libre.com>,
        <linux-serial@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-amlogic@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
CC:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        Neil Armstrong <narmstrong@...libre.com>,
        "Jerome Brunet" <jbrunet@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH V6 0/5] Use CCF to describe the UART baud rate clock

  Hi Kevin,
	First of all,thank you very much for your reply.Due to the Chinese 
Spring Festival holiday recently, so i just reply to you now。

On 2022/1/25 3:58, Kevin Hilman wrote:
> [ EXTERNAL EMAIL ]
> 
> Yu Tu <yu.tu@...ogic.com> writes:
> 
>> Hi Kevin,
>> 	Thank you very much for your reply.
>>
>> On 2022/1/20 6:37, Kevin Hilman wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> Hello,
>>>
>>> Yu Tu <yu.tu@...ogic.com> writes:
>>>
>>>> Using the common Clock code to describe the UART baud rate
>>>> clock makes it easier for the UART driver to be compatible
>>>> with the baud rate requirements of the UART IP on different
>>>> meson chips. Add Meson S4 SoC compatible.
>>>
>>> Could you describe how this was tested and on which SoCs?  There seem to
>>> be some changes in this series that might affect previous SoCs.
>>>
>> For me, the board starts normally and prints. My intention was to add
>> the S4 SOC UART compatible, but for the S4 our baud rate clock is
>> calculated at 12MHz by default.So a series of changes were made at your
>> suggestion.
>>
>> Since most SoCs are too old, I was able to find all the platforms myself
>> such as Meson6, Meson8, Meson8b, GXL and so on. I only tested it with
>> G12A and S4.But when I talked to Martin earlier he tried meson8b's log.
>> The test patch is in the attachment.
>>
>> I have found that on some boards with this change, the initcall_debug
>> Uart driver takes longer to initialize. Running the stty command to
>> change the baud rate at the same time may cause a jam.
> 
> This kind of detail is important to document in the cover letter,
> including a bit more detail on how to reproduce so that other can help
> test or may have ideas for how to solve.
> 
The problem recurrence method is described below:
First, add the patch I changed. It then launches normally to the console 
command line.  Finally, run the stty command to change buad rate. The 
detailed commands are as follows:
stty -F /dev/ttyAML0 115200 and stty -F /dev/ttyAML0 921600 .Alternate 
execution can reproduce.

>> I'd love to know what else you suggest.
> 
> I don't expect you to be able to test on all SoCs, but just to list what
> SoCs and which boards you tested on.  This way, those who have other
> boards can help test and we can have a better idea of how this was
> tested before merging.
> 
I only have S4 and G12A so far, so I've only tested on those two platforms.

> Thanks,
> 
> Kevin
> 

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